SN74AS169A 4 位同步加/减二进制计数器

These synchronous 4-bit up/down binary presettable counters feature an internal carry look-ahead circuitry for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (, ) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.

These counters are fully programmable; that is, they may be preset to either level. The load-input circuitry allows loading with the carry-enable output of cascaded counters

	SN74AS169A
Rating	Catalog
Technology Family	AS

SN74AS169A 特性

• Fully Synchronous Operation for Counting and Programming
• Internal Carry Look-Ahead Circuitry for Fast Counting
• Carry Output for n-Bit Cascading
• Fully Independent Clock Circuit
• Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

SN74AS169A 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74AS169AN	ACTIVE	0 to 70	0.70 | 1ku	PDIP (N) | 16	25 | TUBE
SN74AS169ANE4	ACTIVE	0 to 70	0.70 | 1ku	PDIP (N) | 16	25 | TUBE

SN74AS169A 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74AS169AN	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74AS169AN	SN74AS169AN
SN74AS169ANE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74AS169ANE4	SN74AS169ANE4

SN74AS169A 应用技术支持与电子电路设计开发资源下载

1. SN74AS169A 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)