SN74ALVCH16823 具有三态输出的 18 位总线接口触发器
This 18-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16823 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The SN74ALVCH16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock
| SN74ALVCH16823 | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Technology Family | ALVC |
| Rating | Catalog |
SN74ALVCH16823 特性
- Member of the Texas Instruments WidebusTM Family
- EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
SN74ALVCH16823 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 74ALVCH16823DGGRE4 | ACTIVE | -40 to 85 | 3.45 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| 74ALVCH16823DGGRG4 | ACTIVE | -40 to 85 | 3.45 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| 74ALVCH16823DLRG4 | ACTIVE | -40 to 85 | 3.75 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | ALVCH16821 |
| SN74ALVCH16823DGGR | ACTIVE | -40 to 85 | 3.45 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| SN74ALVCH16823DLR | ACTIVE | -40 to 85 | 3.75 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | ALVCH16821 |
SN74ALVCH16823 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 74ALVCH16823DGGRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16823DGGRE4 | 74ALVCH16823DGGRE4 |
| 74ALVCH16823DGGRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16823DGGRG4 | 74ALVCH16823DGGRG4 |
| 74ALVCH16823DLRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16823DLRG4 | 74ALVCH16823DLRG4 |
| SN74ALVCH16823DGGR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16823DGGR | SN74ALVCH16823DGGR |
| SN74ALVCH16823DLR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16823DLR | SN74ALVCH16823DLR |
SN74ALVCH16823 应用技术支持与电子电路设计开发资源下载
- SN74ALVCH16823 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)