SN74ALVCH16501 具有三态输出的 18 位通用总线收发器
This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
Data flow in each direction is controlled by output-enable (OEAB and OEBA)\, latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B, but uses OEBA\, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA\ is active low).
| SN74ALVCH16501 | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Vcc range(V) | 1.65 to 3.6 |
| Input Level | LVTTL |
| Output Level | LVTTL |
| Output Drive(mA) | -24/24 |
| No. of Outputs | 18 |
| Logic | True |
| Static Current | 0.04 |
| tpd max(ns) | 3.9 |
| Rating | Catalog |
| Technology Family | ALVC |
SN74ALVCH16501 特性
- Member of the Texas Instruments WidebusTM Family
- UBTTM Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes
- Operates From 1.65 V to 3.6 V
- Max tpd of 3.9 ns at 3.3 V
- ±24-mA Output Drive at 3.3 V
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN74ALVCH16501 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 74ALVCH16501DGGRG4 | ACTIVE | -40 to 85 | 1.35 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | |
| 74ALVCH16501DLG4 | ACTIVE | -40 to 85 | 1.75 | 1ku | SSOP (DL) | 56 | 20 | TUBE | |
| 74ALVCH16501DLRG4 | ACTIVE | -40 to 85 | 1.50 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | |
| 74ALVCH16501ZQLR | ACTIVE | -40 to 85 | 2.05 | 1ku | BGA MICROSTAR JUNIOR (ZQL) | 56 | 1000 | LARGE T&R | |
| SN74ALVCH16501DGGR | ACTIVE | -40 to 85 | 1.35 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | |
| SN74ALVCH16501DL | ACTIVE | -40 to 85 | 1.75 | 1ku | SSOP (DL) | 56 | 20 | TUBE | |
| SN74ALVCH16501DLR | ACTIVE | -40 to 85 | 1.50 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | |
| SN74ALVCH16501KR | NRND | -40 to 85 | 2.05 | 1ku | BGA MICROSTAR JUNIOR (ZQL) | 56 | 1000 | LARGE T&R |
SN74ALVCH16501 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 74ALVCH16501DGGRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16501DGGRG4 | 74ALVCH16501DGGRG4 |
| 74ALVCH16501DLG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16501DLG4 | 74ALVCH16501DLG4 |
| 74ALVCH16501DLRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVCH16501DLRG4 | 74ALVCH16501DLRG4 |
| 74ALVCH16501ZQLR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | 74ALVCH16501ZQLR | 74ALVCH16501ZQLR |
| SN74ALVCH16501DGGR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16501DGGR | SN74ALVCH16501DGGR |
| SN74ALVCH16501DL | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16501DL | SN74ALVCH16501DL |
| SN74ALVCH16501DLR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16501DLR | SN74ALVCH16501DLR |
| SN74ALVCH16501KR | TBD | SNPB | Level-1-240C-UNLIM | SN74ALVCH16501KR | SN74ALVCH16501KR |
SN74ALVCH16501 应用技术支持与电子电路设计开发资源下载
- SN74ALVCH16501 数据资料 dataSheet 下载.PDF
- TI 德州仪器通用总线功能产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)