SN74ALVCH162820 具有双路输出和三态输出的 3.3V 10 位触发器

This 10-bit flip-flop is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162820 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable (OE)\ input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state

	SN74ALVCH162820
Voltage Nodes(V)	3.3, 2.7, 2.5, 1.8
Technology Family	ALVC
Rating	Catalog

SN74ALVCH162820 特性

• Member of the Texas Instruments WidebusTM Family
• EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
• Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

SN74ALVCH162820 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
74ALVCH162820DLG4	ACTIVE	-40 to 85	4.00 | 1ku	SSOP (DL) | 56	20 | TUBE	ALVCH162720
74ALVCH162820DLRG4	ACTIVE	-40 to 85	3.40 | 1ku	SSOP (DL) | 56	1000 | LARGE T&R	ALVCH162720
74ALVCH162820GRE4	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162720
74ALVCH162820GRG4	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162720
SN74ALVCH162820DGGR	OBSOLETE	-40 to 85		TSSOP (DGG) | 56
SN74ALVCH162820DL	ACTIVE	-40 to 85	4.00 | 1ku	SSOP (DL) | 56	20 | TUBE	ALVCH162720
SN74ALVCH162820DLR	ACTIVE	-40 to 85	3.40 | 1ku	SSOP (DL) | 56	1000 | LARGE T&R	ALVCH162720
SN74ALVCH162820GR	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162720

SN74ALVCH162820 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
74ALVCH162820DLG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162820DLG4	74ALVCH162820DLG4
74ALVCH162820DLRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162820DLRG4	74ALVCH162820DLRG4
74ALVCH162820GRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162820GRE4	74ALVCH162820GRE4
74ALVCH162820GRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162820GRG4	74ALVCH162820GRG4
SN74ALVCH162820DL	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162820DL	SN74ALVCH162820DL
SN74ALVCH162820DLR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162820DLR	SN74ALVCH162820DLR
SN74ALVCH162820GR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162820GR	SN74ALVCH162820GR

SN74ALVCH162820 应用技术支持与电子电路设计开发资源下载

1. SN74ALVCH162820 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)