SN74ALVCH162260 具有三态输出的 12 位至 24 位多路复用 D 类锁存器
This 12-bit to 24-bit multiplexed D-type latch is designed for 1.65-V to 3.6-VCC operation.
The SN74ALVCH162260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface applications. This device also is useful in memory-interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and/or data transfer. The output-enable (OE1B\, OE2B\, and OEA\) inputs control the bus transceiver functions. The OE1B\ and OE2B\ control signals also allow bank control in the A-to-B direction
| SN74ALVCH162260 | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Technology Family | ABT |
| Rating | Catalog |
SN74ALVCH162260 特性
- Member of the Texas Instruments WidebusTM Family
- EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
- B-Port Outputs Have Equivalent 26-
Series Resistors, So No External Resistors Are Required
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include Thin-Shrink Small-Outline (DGG) and Plastic Shrink Small-Outline (DL) Packages
SN74ALVCH162260 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74ALVCH162260DGGR | ACTIVE | -40 to 85 | 1.05 | 1ku | TSSOP (DGG) | 48 | 2000 | LARGE T&R | |
| SN74ALVCH162260DGVR | ACTIVE | -40 to 85 | 1.05 | 1ku | TVSOP (DGV) | 48 | 2000 | LARGE T&R | |
| SN74ALVCH162260DL | ACTIVE | -40 to 85 | 1.35 | 1ku | SSOP (DL) | 48 | 25 | TUBE | |
| SN74ALVCH162260DLG4 | ACTIVE | -40 to 85 | 1.35 | 1ku | SSOP (DL) | 48 | 25 | TUBE | |
| SN74ALVCH162260DLR | ACTIVE | -40 to 85 | 1.15 | 1ku | SSOP (DL) | 48 | 1000 | LARGE T&R | |
| SN74ALVCH162260DLRG4 | ACTIVE | -40 to 85 | 1.15 | 1ku | SSOP (DL) | 48 | 1000 | LARGE T&R |
SN74ALVCH162260 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74ALVCH162260DGGR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DGGR | SN74ALVCH162260DGGR |
| SN74ALVCH162260DGVR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DGVR | SN74ALVCH162260DGVR |
| SN74ALVCH162260DL | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DL | SN74ALVCH162260DL |
| SN74ALVCH162260DLG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DLG4 | SN74ALVCH162260DLG4 |
| SN74ALVCH162260DLR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DLR | SN74ALVCH162260DLR |
| SN74ALVCH162260DLRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH162260DLRG4 | SN74ALVCH162260DLRG4 |
SN74ALVCH162260 应用技术支持与电子电路设计开发资源下载
- SN74ALVCH162260 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)