SN74ALVCF162835 具有三态输出的 3.3V CMOS 18 位通用总线驱动器

This 18-bit universal bus driver is designed for 2.3-V to 3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.

The SN74ALVCF162835 has series damping resistors in the device output structure that reduce switching noise in 128-MB and 256-MB SDRAM modules. Designed with a drive capability of ±18 mA, this device is a midway drive between the SN74ALVC162835 (±12 mA) and SN74ALVC16835 (±24 mA).

	SN74ALVCF162835
Voltage Nodes(V)	3.3, 2.7, 2.5
Rating	Catalog
Technology Family	ALVC

SN74ALVCF162835 特性

• Member of the Texas Instruments WidebusTM Family
• Ideal for Use in PC133 Register DIMM
• Typical Output Skew . . . <250 ps
• VCC = 3.3 V ± 0.3 V . . . Normal Range
• VCC = 2.7 V to 3.6 V . . . Extended Range
• VCC = 2.5 V ± 0.2 V
• Rail-to-Rail Output Swing for Increased Noise Margin
• Balanced Output Drivers . . . ±18 mA
• Low Switching Noise
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

SN74ALVCF162835 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
74ALVCF162835DGGRE4	ACTIVE	-40 to 85	4.00 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R
74ALVCF162835DGGRG4	ACTIVE	-40 to 85	4.00 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R
74ALVCF162835DGVRE4	ACTIVE	-40 to 85	4.00 | 1ku	TVSOP (DGV) | 56	2000 | LARGE T&R
74ALVCF162835DGVRG4	ACTIVE	-40 to 85	4.00 | 1ku	TVSOP (DGV) | 56	2000 | LARGE T&R
74ALVCF162835DLG4	ACTIVE	-40 to 85	5.25 | 1ku	SSOP (DL) | 56	20 | TUBE
SN74ALVCF162835DGGR	ACTIVE	-40 to 85	4.00 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R
SN74ALVCF162835DGVR	ACTIVE	-40 to 85	4.00 | 1ku	TVSOP (DGV) | 56	2000 | LARGE T&R
SN74ALVCF162835DL	ACTIVE	-40 to 85	5.25 | 1ku	SSOP (DL) | 56	20 | TUBE

SN74ALVCF162835 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
74ALVCF162835DGGRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCF162835DGGRE4	74ALVCF162835DGGRE4
74ALVCF162835DGGRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCF162835DGGRG4	74ALVCF162835DGGRG4
74ALVCF162835DGVRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCF162835DGVRE4	74ALVCF162835DGVRE4
74ALVCF162835DGVRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCF162835DGVRG4	74ALVCF162835DGVRG4
74ALVCF162835DLG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCF162835DLG4	74ALVCF162835DLG4
SN74ALVCF162835DGGR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCF162835DGGR	SN74ALVCF162835DGGR
SN74ALVCF162835DGVR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCF162835DGVR	SN74ALVCF162835DGVR
SN74ALVCF162835DL	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCF162835DL	SN74ALVCF162835DL

SN74ALVCF162835 应用技术支持与电子电路设计开发资源下载

1. SN74ALVCF162835 数据资料 dataSheet 下载.PDF
2. TI 德州仪器通用总线功能产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)