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SN74ALVC08 四路 2 输入正与门

This quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V VCCoperation.

The device performs the Boolean function Y = A o B or Y = (A + B)\ in positive logic

SN74ALVC08
Rating Catalog
Technology Family ALVC
SN74ALVC08 特性
SN74ALVC08 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74ALVC08D ACTIVE -40 to 85 0.24 | 1ku SOIC (D) | 14 50 | TUBE  
SN74ALVC08DE4 ACTIVE -40 to 85 0.24 | 1ku SOIC (D) | 14 50 | TUBE  
SN74ALVC08DG4 ACTIVE -40 to 85 0.24 | 1ku SOIC (D) | 14 50 | TUBE  
SN74ALVC08DR ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74ALVC08DRE4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74ALVC08DRG4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74ALVC08N ACTIVE -40 to 85 0.22 | 1ku PDIP (N) | 14 25 | TUBE  
SN74ALVC08NE4 ACTIVE -40 to 85 0.22 | 1ku PDIP (N) | 14 25 | TUBE  
SN74ALVC08 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74ALVC08D Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08D SN74ALVC08D
SN74ALVC08DE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08DE4 SN74ALVC08DE4
SN74ALVC08DG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08DG4 SN74ALVC08DG4
SN74ALVC08DR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08DR SN74ALVC08DR
SN74ALVC08DRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08DRE4 SN74ALVC08DRE4
SN74ALVC08DRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVC08DRG4 SN74ALVC08DRG4
SN74ALVC08N Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74ALVC08N SN74ALVC08N
SN74ALVC08NE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74ALVC08NE4 SN74ALVC08NE4
SN74ALVC08 应用技术支持与电子电路设计开发资源下载
  1. SN74ALVC08 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)