SN74AHC123A-EP
The SN74AHC123A device is a dual retriggerable monostable multivibrator designed for 2-V to 5.5-V VCC operation.
This edge-triggered multivibrator features output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.
The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration can be reduced by taking CLR low.
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs.
Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A) or high-level-active (B) input. Pulse duration can be reduced by taking CLR low. CLR can be used to override A or B inputs. The input/output timing diagram illustrates pulse control by retriggering the inputs and early clearing.
The variance in output pulse duration from device to device is less than ±0.5% (typ) for given external timing components.
During power up, Q outputs are in the low state and Q outputs are in the high state. The outputs are glitch free, without applying a reset pulse.
For additional application information on multivibrators, see the application report Designing With the SN74AHC123A and SN74AHCT123A, literature number SCLA014
| SN74AHC123A-EP | |
| Voltage Nodes(V) | 5, 3.3 |
| Vcc range(V) | 2 tp 5.5 |
| Rating | HiRel Enhanced Product |
| Technology Family | AHC |
SN74AHC123A-EP 特性
- Controlled Baseline
- One Assembly Site
- One Test Site
- One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Operating Range 2-V to 5.5-V VCC
- Schmitt-Trigger Circuitry On A, B, and CLR Inputs for Slow Input Transition Rates
- Edge Triggered From Active-High or Active-Low Gated Logic Inputs
- Retriggerable for Long Output Pulses
- Overriding Clear Terminates Output Pulse
- Glitch-Free Power-Up Reset On Outputs
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74AHC123A-EP 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74AHC123AMDREP | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| SN74AHC123AMDREPG4 | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| V62/06665-01XE | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R |
SN74AHC123A-EP 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74AHC123AMDREP | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AHC123AMDREP | SN74AHC123AMDREP |
| SN74AHC123AMDREPG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AHC123AMDREPG4 | SN74AHC123AMDREPG4 |
| V62/06665-01XE | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | V62/06665-01XE | V62/06665-01XE |
SN74AHC123A-EP 应用技术支持与电子电路设计开发资源下载
- SN74AHC123A-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器特殊逻辑产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)