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SN74ABT16821 具有三态输出的 20 位总线接口触发器

These 20-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The 'ABT16821 can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable () input can be used to place the ten outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly

SN74ABT16821
Voltage Nodes(V) 5
Rating Catalog
SN74ABT16821 特性
SN74ABT16821 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74ABT16821DGGR ACTIVE -40 to 85 2.86 | 1ku TSSOP (DGG) | 56 2000 | LARGE T&R  
SN74ABT16821DL ACTIVE -40 to 85 2.86 | 1ku SSOP (DL) | 56 20 | TUBE  
SN74ABT16821DLG4 ACTIVE -40 to 85 2.86 | 1ku SSOP (DL) | 56 20 | TUBE  
SN74ABT16821DLR ACTIVE -40 to 85 2.86 | 1ku SSOP (DL) | 56 1000 | LARGE T&R  
SN74ABT16821 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74ABT16821DGGR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16821DGGR SN74ABT16821DGGR
SN74ABT16821DL Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16821DL SN74ABT16821DL
SN74ABT16821DLG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16821DLG4 SN74ABT16821DLG4
SN74ABT16821DLR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16821DLR SN74ABT16821DLR
SN74ABT16821 应用技术支持与电子电路设计开发资源下载
  1. SN74ABT16821 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
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  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
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