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SN65MLVD203 全双工 M-LVDS 收发器

The SN65MLVD203, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3

SN65MLVD2 SN65MLVD200A SN65MLVD203 SN65MLVD202A SN65MLVD203 SN65MLVD204A SN65MLVD205A SN65MLVD206 SN65MLVD207 SN65MLVD3
No. of Rx 1 1 1 1 1 1 1 1 1 1
No. of Tx 1 1 1 1 1 1 1 1
Input Signal M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS M-LVDS
Output Signal LVTTL LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL, M-LVDS LVTTL
Signaling Rate(Mbps) 250 100 200 100 200 100 100 200 200 250
Supply Voltage(s)(V) 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3
ICC(Max)(mA) 25 24 24 24 24 24 24 24 24 25
Receiver Type 1 1 1 1 1 2 2 2 2 2
Peak-to-Peak Jitter(Max)(ps) 10 8
Part-to-Part Skew(Max)(ps) 100 1000 1000 1000 1000 1000 1000 1000 1000 100
Rx tpd(Typ)(ns) 6 3.6 4 3.6 4 3.6 3.6 4 4 6
Tx tpd(Typ)(ns) 2.5 1.5 2.5 1.5 2.5 2.5 1.5 1.5
Pin/Package 8SON 8SOIC 8SOIC 14SOIC 14SOIC 8SOIC 14SOIC 8SOIC 14SOIC 8SON
Operating Temperature Range(C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85
ESD HBM(kV) 8 8 8 8 8 8 8 8 8 8
SN65MLVD203 特性
SN65MLVD203 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN65MLVD203D ACTIVE -40 to 85 1.70 | 1ku SOIC (D) | 14 50 | TUBE  
SN65MLVD203DG4 ACTIVE -40 to 85 1.70 | 1ku SOIC (D) | 14 50 | TUBE  
SN65MLVD203DR ACTIVE -40 to 85 1.40 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN65MLVD203DRG4 ACTIVE -40 to 85 1.40 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN65MLVD203 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN65MLVD203D Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65MLVD203D SN65MLVD203D
SN65MLVD203DG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65MLVD203DG4 SN65MLVD203DG4
SN65MLVD203DR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65MLVD203DR SN65MLVD203DR
SN65MLVD203DRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65MLVD203DRG4 SN65MLVD203DRG4
SN65MLVD203 应用技术支持与电子电路设计开发资源下载
  1. SN65MLVD203 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器M-LVDS PHYs选型与价格 . xls
  3. 所选封装材料的热学和电学性质 (PDF 645 KB)
  4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
  5. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
  6. 接口选择指南 (Rev. D) (PDF 2994 KB)
  7. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
  8. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
  9. Isolated RS-485 Reference Design (PDF 80 KB)
  10. 无铅组件涂层的保存期评估 (PDF 1305 KB)
  11. Analog Signal Chain Guide (8.62 MB)
  12. Industrial Interface IC Solutions (101 KB)
SN65MLVD203 工具和软件
培训内容 型号 软件/工具类型
M-LVDS 评估模块 MLVD20XEVM 开发电路板/EVM
SN65MLVD2-3EVM 评估模块 SN65MLVD2-3EVM 开发电路板/EVM