SN65LVDT250 2.0Gbps 4x4 交叉点交换器
The SN65LVDS250 and SN65LVDT250 are 4x4 nonblocking crosspoint switches in a flow-through pin-out allowing for ease in PCB layout. Low-voltage differential signaling (LVDS) is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 4:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve the high signaling speeds while maintaining low signal skews. The SN65LVDT250 incorporates 110-
termination resistors for those applications where board space is a premium.
The SN65LVDS250 and SN65LVDT250 are characterized for operation from –40°C to 85°C
|
SN65LVDT250 |
| No. of Rx |
4 |
| No. of Tx |
4 |
| Signaling Rate(Mbps) |
2000 |
| Supply Voltage(s)(V) |
3.3 |
| ICC(Max)(mA) |
145 |
| Pin/Package |
38TSSOP |
| Operating Temperature Range(°C) |
-40 to 85 |
| Peak-to-Peak Jitter(Max)(ps) |
110 |
| Output Signal |
LVDS |
| Input Signal |
CML, LVDS, LVPECL |
| Part-to-Part Skew(Max)(ps) |
300 |
| Rx tpd(Typ)(ns) |
0.8 |
| Tx tpd(Typ)(ns) |
0.8 |
| ESD HBM(kV) |
3 |
| Approx. Price (US$) |
7.00 | 1ku |
SN65LVDT250 特性
- Greater Than 2.0 Gbps Operation
- Nonblocking Architecture Allows Each Output to be Connected to Any Input
- Pk.Pk Jitter:
- 60 ps Typical at 2.0 Gbps
- 110 ps Typical at 2.5 Gbps
- Compatible With ANSI TIA/EIA-644-A LVDS Standard
- Available Packaging 38-Pin TSSOP
- 25 mV of Input Voltage Threshold Hysteresis
- Propagation Delay Times: 800 ps Typical
- Inputs Electrically Compatible With LVPECL, CML and LVDS Signal Levels
- Operates From a Single 3.3-V Supply
- Low Power: 110 mA Typical
- Integrated 110- Line Termination Resistors Available With SN65LVDT250
- APPLICATIONS
- Clock Buffering/Clock Muxing
- Wireless Base Stations
- High-Speed Network Routing
- Telecom/Datacom
SN65LVDT250 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN65LVDT250DBT |
ACTIVE |
-40 to 85 |
8.75 | 1ku |
TSSOP (DBT) | 38 |
50 | TUBE |
|
| SN65LVDT250DBTG4 |
ACTIVE |
-40 to 85 |
8.75 | 1ku |
TSSOP (DBT) | 38 |
50 | TUBE |
|
| SN65LVDT250DBTR |
ACTIVE |
-40 to 85 |
6.75 | 1ku |
TSSOP (DBT) | 38 |
2000 | LARGE T&R |
|
| SN65LVDT250DBTRG4 |
ACTIVE |
-40 to 85 |
6.75 | 1ku |
TSSOP (DBT) | 38 |
2000 | LARGE T&R |
|
SN65LVDT250 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN65LVDT250DBT |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDT250DBT |
SN65LVDT250DBT |
| SN65LVDT250DBTG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDT250DBTG4 |
SN65LVDT250DBTG4 |
| SN65LVDT250DBTR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDT250DBTR |
SN65LVDT250DBTR |
| SN65LVDT250DBTRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDT250DBTRG4 |
SN65LVDT250DBTRG4 |
SN65LVDT250 应用技术支持与电子电路设计开发资源下载
- SN65LVDT250 数据资料 dataSheet 下载.PDF
- TI 德州仪器LVDS/M-LVDS/ECL/CML选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)