SN65LVDS93 Serdes（串行器/解串器）发送器
The SN65LVDS93 LVDS serdes (serializer/ deserializer) transmitter contains four 7-bit parallel- load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) drivers in a single integrated circuit. These functions allow 28 bits of single-ended LVTTL data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN65LVDS94.
When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected via the clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times and then used to serially unload the data registers in 7-bit slices
|
SN65LVDS93 |
| Data Throughput(MB/s) |
227.5 |
| Number of Parallel Inputs |
28 |
| Serial Data Transmitter Channels |
4 |
| PLL Frequency(MHz) |
20 - 65 |
| ICC(mA) |
120 |
| Supply Voltage(s)(V) |
3.3 |
| Pin/Package |
56TSSOP |
| Footprint |
SN75LVDS83 |
| Operating Temperature Range(C) |
-40 to 85 |
| Driver tpd(ns) |
14.2 |
| Type of Line Circuit |
LVDS |
| Driver (RL)(Ohms) |
100 |
SN65LVDS93 特性
- 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput
- Suited for Point-to-Point Subsystem Communication With Very Low EMI
- 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential
- Selectable Rising or Falling Clock Edge Triggered Inputs
- Bus Pins Tolerate 6-kV HBM ESD
- Operates From a Single 3.3-V Supply and 250 mW (Typ)
- 5-V Tolerant Data Inputs
- Packaged in Thin Shrink Small-Outline Package With 20 Mil Terminal Pitch
- Consumes <1 mW When Disabled
- Wide Phase-Lock Input Frequency Range 20 MHz to 68 MHz
- No External Components Required for PLL
- Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
- Industrial Temperature Qualified TA = -40°C to 85°C
- Replacement for the DS90CR285
SN65LVDS93 芯片订购指南
SN65LVDS93 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN65LVDS93DGG |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDS93DGG |
SN65LVDS93DGG |
| SN65LVDS93DGGG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDS93DGGG4 |
SN65LVDS93DGGG4 |
| SN65LVDS93DGGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDS93DGGR |
SN65LVDS93DGGR |
| SN65LVDS93DGGRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN65LVDS93DGGRG4 |
SN65LVDS93DGGRG4 |
SN65LVDS93 应用技术支持与电子电路设计开发资源下载
- TI 德州仪器串行器和解串器选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN65LVDS93 工具和软件