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SN65LVDS33-EP 增强型产品高速差动接收器

This family of four LVDS data line receivers offers the widest common-mode input voltage range in the industry. These receivers provide an input voltage range specification compatible with a 5-V PECL signal as well as an overall increased ground-noise tolerance. They are in industry standard footprints with integrated termination as an option.

Precise control of the differential input voltage thresholds allows for inclusion of 50 mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than +50 mV over the full input common-mode voltage range.

The high-speed switching of LVDS signals usually necessitates the use of a line impedance matching resistor at the receiving-end of the cable or transmission media

SN65LVDS33-EP
Input Signal CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL
Output Signal LVTTL
No. of Rx 4
Signaling Rate(Mbps) 400
Supply Voltage(s)(V) 3.3
ICC(Max)(mA) 25
Rx tpd(Typ)(ns) 4
Part-to-Part Skew(Max)(ps) 1200
Pin/Package 16SOIC
Operating Temperature Range(°C) -55 to 125
ESD HBM(kV) 15
SN65LVDS33-EP 特性
SN65LVDS33-EP 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN65LVDS33-EPD ACTIVE -40 to 85 1.55 | 1ku SOIC (D) | 16 40 | TUBE  
SN65LVDS33-EPDG4 ACTIVE -40 to 85 1.55 | 1ku SOIC (D) | 16 40 | TUBE  
SN65LVDS33-EPDR ACTIVE -40 to 85 1.30 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN65LVDS33-EPDRG4 ACTIVE -40 to 85 1.30 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN65LVDS33-EPPW ACTIVE -40 to 85 1.55 | 1ku TSSOP (PW) | 16 90 | TUBE  
SN65LVDS33-EPPWG4 ACTIVE -40 to 85 1.55 | 1ku TSSOP (PW) | 16 90 | TUBE  
SN65LVDS33-EPPWR ACTIVE -40 to 85 1.30 | 1ku TSSOP (PW) | 16 2000 | LARGE T&R  
SN65LVDS33-EPPWRG4 ACTIVE -40 to 85 1.30 | 1ku TSSOP (PW) | 16 2000 | LARGE T&R  
SN65LVDS33-EP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN65LVDS33-EPD Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPD SN65LVDS33-EPD
SN65LVDS33-EPDG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPDG4 SN65LVDS33-EPDG4
SN65LVDS33-EPDR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPDR SN65LVDS33-EPDR
SN65LVDS33-EPDRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPDRG4 SN65LVDS33-EPDRG4
SN65LVDS33-EPPW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPPW SN65LVDS33-EPPW
SN65LVDS33-EPPWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPPWG4 SN65LVDS33-EPPWG4
SN65LVDS33-EPPWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPPWR SN65LVDS33-EPPWR
SN65LVDS33-EPPWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LVDS33-EPPWRG4 SN65LVDS33-EPPWRG4
SN65LVDS33-EP 应用技术支持与电子电路设计开发资源下载
  1. SN65LVDS33-EP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器LVDS PHYs选型与价格 . xls
  3. 所选封装材料的热学和电学性质 (PDF 645 KB)
  4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
  5. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
  6. 接口选择指南 (Rev. D) (PDF 2994 KB)
  7. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
  8. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
  9. Isolated RS-485 Reference Design (PDF 80 KB)
  10. 无铅组件涂层的保存期评估 (PDF 1305 KB)
  11. Analog Signal Chain Guide (8.62 MB)
  12. Industrial Interface IC Solutions (101 KB)