SN65LVDM1676 16 通道 LVDM 收发器
The SN65LVDM1676 and SN65LVDM1677 (integrated termination) are sixteen differential line transmitters or receivers (tranceivers) that use low-voltage differential signaling (LVDS) to achieve signaling rates up to 200 Mbps per transceiver configured as a receiver and up to 650 Mbps per transceiver configured as a transmitter. These products are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers are doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50-
SN65LVDM1676 SN65LVDM1677 SN65MLVD080 SN65MLVD082
No. of Rx
16
16
8
8
No. of Tx
16
16
8
8
Input Signal
LVDM, LVTTL
LVDM, LVTTL
LVTTL, M-LVDS
LVTTL, M-LVDS
Output Signal
LVDM, LVTTL
LVDM, LVTTL
M-LVDS, TTL
M-LVDS, TTL
Signaling Rate(Mbps)
650TX/250RX
650TX/250RX
250
250
Supply Voltage(s)(V)
3.3
3.3
3.3
3.3
ICC(Max)(mA)
175
175
180
180
Receiver Type
1
2
Part-to-Part Skew(Max)(ps)
1000
1000
600
600
Rx tpd(Typ)(ns)
3
3
6
6
Tx tpd(Typ)(ns)
2.5
2.5
2.4
2.4
Pin/Package
64TSSOP
64TSSOP
64TSSOP
64TSSOP
Operating Temperature Range(C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
ESD HBM(kV)
15
15
8
8
SN65LVDM1676 特性
Sixteen Low-Voltage Differential Transceivers. Designed for Signaling Rates up to 200 Mbps per Receiver or 650 Mbps per Transmitter.
Simplex (Point-to-Point) or Half-Duplex (Multipoint) Interface
Typical Differential Output Voltage of 340 mV Into a 50- Propagation Delay Time:
Driver: 2.5 ns Typ
Receiver: 3 ns Typ
Driver is High Impedance When Disabled or With VCC < 1.5 V for Power Up/Down Glitch-Free Performance and Hot-Plugging Events
Bus-Terminal ESD Protection Exceeds 12 kV
Low-Voltage TTL (LVTTL) Logic Input Levels Are 5-V Tolerant
Packaged in Thin Shrink Small-Outline Package With 20 mil Terminal Pitch
SN65LVDM1676 芯片订购指南
器件
状态
温度
价格
封装 | 引脚
封装数量 | 封装载体
丝印标记
SN65LVDM1676DGG
ACTIVE
-40 to 85
7.20 | 1ku
TSSOP (DGG) | 64 25 | TUBE
SN65LVDM1676DGGG4
ACTIVE
-40 to 85
7.20 | 1ku
TSSOP (DGG) | 64 25 | TUBE
SN65LVDM1676DGGR
ACTIVE
-40 to 85
6.00 | 1ku
TSSOP (DGG) | 64 2000 | LARGE T&R
SN65LVDM1676DGGRG4
ACTIVE
-40 to 85
6.00 | 1ku
TSSOP (DGG) | 64 2000 | LARGE T&R
SN65LVDM1676 质量与无铅数据
器件
环保计划*
铅/焊球涂层
MSL 等级/回流焊峰
环保信息与无铅 (Pb-free)
DPPM / MTBF / FIT 率
SN65LVDM1676DGG
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN65LVDM1676DGG
SN65LVDM1676DGG
SN65LVDM1676DGGG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN65LVDM1676DGGG4 SN65LVDM1676DGGG4
SN65LVDM1676DGGR
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN65LVDM1676DGGR
SN65LVDM1676DGGR
SN65LVDM1676DGGRG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN65LVDM1676DGGRG4 SN65LVDM1676DGGRG4
SN65LVDM1676 应用技术支持与电子电路设计开发资源下载
SN65LVDM1676 数据资料 dataSheet 下载 .PDF TI 德州仪器M-LVDS PHYs选型与价格 . xls 所选封装材料的热学和电学性质 (PDF 645 KB)使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)接口选择指南 (Rev. D) (PDF 2994 KB)Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)Isolated RS-485 Reference Design (PDF 80 KB)无铅组件涂层的保存期评估 (PDF 1305 KB)Analog Signal Chain Guide (8.62 MB)Industrial Interface IC Solutions (101 KB)
load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.