SN65LVDM051-Q1 汽车类双路 LVDS 发送器/接收器器
The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50-
load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.
| SN65LVDM051-Q1 | |
| No. of Rx | 2 |
| No. of Tx | 2 |
| Input Signal | LVDM, LVTTL |
| Output Signal | LVDM, LVTTL |
| Signaling Rate(Mbps) | 500 |
| Supply Voltage(s)(V) | 3.3 |
| ICC(Max)(mA) | 27 |
| Rx tpd(Typ)(ns) | 3.7 |
| Tx tpd(Typ)(ns) | 1.7 |
| Pin/Package | 16SOIC |
| Operating Temperature Range(C) | -40 to 125 |
| ESD HBM(kV) | 12 |
SN65LVDM051-Q1 特性
- Qualified for Automotive Applications
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Low-Voltage Differential 50- Line Drivers and Receivers
- Signaling Rates up to 500 Mbps
- Bus-Terminal ESD Exceeds 12 kV
- Operates From a Single 3.3 V Supply
- Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load
- Valid Output With as Little as 50-mV Input Voltage Difference
- Propagation Delay Times
- Driver: 1.7 ns Typ
- Receiver: 3.7 ns Typ
- Power Dissipation at 200 MHz
- Driver: 50 mW Typical
- Receiver: 60 mW Typical
- LVTTL Input Levels Are 5 V Tolerant
- Driver Is High Impedance When Disabled or With VCC < 1.5 V
- Receiver Has Open-Circuit Fail Safe
SN65LVDM051-Q1 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN65LVDM051QDG4Q1 | ACTIVE | -40 to 125 | 1.80 | 1ku | SOIC (D) | 16 | 40 | |
| SN65LVDM051QDQ1 | ACTIVE | -40 to 125 | 2.10 | 1ku | SOIC (D) | 16 | 40 | |
| SN65LVDM051QDRG4Q1 | ACTIVE | -40 to 125 | 1.80 | 1ku | SOIC (D) | 16 | 2500 | |
| SN65LVDM051QDRQ1 | ACTIVE | -40 to 125 | 1.80 | 1ku | SOIC (D) | 16 | 2500 |
SN65LVDM051-Q1 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN65LVDM051QDG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDM051QDG4Q1 | SN65LVDM051QDG4Q1 |
| SN65LVDM051QDQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDM051QDQ1 | SN65LVDM051QDQ1 |
| SN65LVDM051QDRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDM051QDRG4Q1 | SN65LVDM051QDRG4Q1 |
| SN65LVDM051QDRQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDM051QDRQ1 | SN65LVDM051QDRQ1 |
SN65LVDM051-Q1 应用技术支持与电子电路设计开发资源下载
- SN65LVDM051-Q1 数据资料 dataSheet 下载.PDF
- TI 德州仪器M-LVDS PHYs选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)