SN54S182 超前载波发生器
The SN54S182 and SN74S182 are high-speed, look-ahead carry generators capable of anticipating a carry across four binary adders or group of adders. They are cascadable to perform full look-ahead across n-bit adders. Carry, generate-carry, and propagate-carry functions are provided as enumerated in the pin designation table above.
When used in conjunction with the 'LS181 or 'S181 arithmetic logic unit (ALU), these generators provide high-speed carry look-ahead capability for any word length. Each 'S182 generates the look-ahead (anticipated carry) across a group of four ALUs and, in addition, other carry look-ahead circuits may be employed to anticipate carry across sections of four look-ahead packages up to n-bits
|
SN54S182 |
| Rating |
Military |
| Technology Family |
S |
SN54S182 特性
- Directly Compatible for Use With:
- SN54LS181/SN74LS181,
- SN54S281/SN74S281, SN54S381,
- SN74S381, SN54S481/SN74S481
SN54S182 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN54S182J |
ACTIVE |
-55 to 125 |
10.57 | 1ku |
CDIP (J) | 16 |
1 | TUBE |
|
| SNJ54S182FK |
ACTIVE |
-55 to 125 |
17.72 | 1ku |
LCCC (FK) | 20 |
1 | TUBE |
|
| SNJ54S182J |
ACTIVE |
-55 to 125 |
12.46 | 1ku |
CDIP (J) | 16 |
1 | TUBE |
|
| SNJ54S182W |
ACTIVE |
-55 to 125 |
14.61 | 1ku |
CFP (W) | 16 |
1 | TUBE |
|
SN54S182 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN54S182J |
TBD |
A42 |
N/A for Pkg Type |
SN54S182J |
SN54S182J |
| SNJ54S182FK |
TBD |
POST-PLATE |
N/A for Pkg Type |
SNJ54S182FK |
SNJ54S182FK |
| SNJ54S182J |
TBD |
A42 |
N/A for Pkg Type |
SNJ54S182J |
SNJ54S182J |
| SNJ54S182W |
TBD |
Call TI |
N/A for Pkg Type |
SNJ54S182W |
SNJ54S182W |
SN54S182 应用技术支持与电子电路设计开发资源下载
- SN54S182 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)