These Schottky-clamped TTL MSI circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast-enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the Schottky-clamped system decoder is negligible.
The circuit comprises two individual two-line to four-line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications
SN54S139 | |
Rating | Military |
Technology Family | S |
器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SNJ54S139FK | ACTIVE | -55 to 125 | 11.77 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
SNJ54S139J | ACTIVE | -55 to 125 | 2.49 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
SNJ54S139W | ACTIVE | -55 to 125 | 12.36 | 1ku | CFP (W) | 16 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SNJ54S139FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54S139FK | SNJ54S139FK |
SNJ54S139J | TBD | A42 | N/A for Pkg Type | SNJ54S139J | SNJ54S139J |
SNJ54S139W | TBD | A42 | N/A for Pkg Type | SNJ54S139W | SNJ54S139W |