SN54LS73A-SP 具有清零功能和三态输出的双路 J-K 触发器

The '73, and 'H73, contain two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The '73, and 'H73, are positive pulse-triggered flip-flops. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS73A contains two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q\ output high.

The SN5473, SN54H73, and the SN54LS73A are characterized for operation over the full military temperature range of -55°C to 125°C

	SN54LS73A-SP
Voltage Nodes(V)	5
Rating	Space

SN54LS73A-SP 特性

• Package Options Include Plastic “Small Outline" Packages, Flat Packages, and Plastic and Ceramic DIPs
• Dependable Texas Instruments Quality and Reliability

SN54LS73A-SP 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
5962-9675101VCA	ACTIVE	-55 to 125	115.12 | 1ku	CDIP (J) | 14	1 | TUBE
5962-9675101VDA	ACTIVE	-55 to 125	100.10 | 1ku	CFP (W) | 14	1 | TUBE

SN54LS73A-SP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
5962-9675101VCA	TBD	A42	N/A for Pkg Type	5962-9675101VCA	5962-9675101VCA
5962-9675101VDA	TBD	Call TI	N/A for Pkg Type	5962-9675101VDA	5962-9675101VDA

SN54LS73A-SP 应用技术支持与电子电路设计开发资源下载

1. SN54LS73A-SP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)