These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.
SN54LS373-SP | |
Voltage Nodes(V) | 6, 5, 2 |
Rating | Space |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
JM38510/32502SRA | ACTIVE | 5962-9074601MRA | 12.02 | 1ku | CDIP (J) | 20 | 1 | TUBE | |
JM38510/32502SSA | ACTIVE | 5962-9074601MSA | 13.44 | 1ku | CFP (W) | 20 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
JM38510/32502SRA | TBD | A42 | N/A for Pkg Type | JM38510/32502SRA | JM38510/32502SRA |
JM38510/32502SSA | TBD | Call TI | N/A for Pkg Type | JM38510/32502SSA | JM38510/32502SSA |