The ’279 offers 4 basic S\-R\ flip-flop latches in one 16-pin, 300-mil package. Under conventional operation, the S\-R\ inputs are normally held high. When the S\ input is pulsed low, the Q output will be set high. When R\ is pulsed low, the Q output will be reset low. Normally, the S\-R\ inputs should not be taken low simultaneously. The Q output will be unpredictable in this condition.
SN54LS279A | |
Voltage Nodes(V) | 5 |
Vcc range(V) | 4.5 to 5.5 |
Input Level | TTL |
Output Level | TTL |
Output Drive(mA) | |
Output | 2S |
No. of Bits | 4 |
tpd max(ns) | |
Rating | Military |
Technology Family | LS |
器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN54LS279AJ | ACTIVE | -55 to 125 | 6.67 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
SNJ54LS279AFK | OBSOLETE | -55 to 125 | LCCC (FK) | 20 | |||
SNJ54LS279AJ | ACTIVE | -55 to 125 | 7.88 | 1ku | CDIP (J) | 16 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN54LS279AJ | TBD | A42 | N/A for Pkg Type | SN54LS279AJ | SN54LS279AJ |
SNJ54LS279AFK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54LS279AFK | SNJ54LS279AFK |
SNJ54LS279AJ | TBD | A42 | N/A for Pkg Type | SNJ54LS279AJ | SNJ54LS279AJ |