SN54LS148 10 线路到 4 线路和 8 线路到 3 线路优先级编码器
These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The '147 and 'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition as zero is encoded when all nine data lines are at a high logic level. The '148 and 'LS148 encode eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input E1 and enable output E0) has been provided to allow octal expansion without the need for external circuitry. For all types, data inputs and outputs are active at the low logic level. All inputs are buffered to represent one normalized Series 54/74 or 54LS/74LS load, respectively.
| SN54LS148 | |
| Rating | Military |
| Technology Family | LS |
SN54LS148 特性
- '147, 'LS147
- Encodes 10-Line Decimal to 4-Line BCD
- Applications Include:
- Keyboard Encoding
- Range Selection
- '148, 'LS148
- Encodes 8 Data Lines to 3-Line Binary (Octal)
- Applications Include:
- N-Bit Encoding
- Code Converters and Generators
SN54LS148 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54LS148J | ACTIVE | -55 to 125 | 4.24 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS148FK | ACTIVE | -55 to 125 | 15.53 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54LS148J | ACTIVE | -55 to 125 | 5.69 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS148W | ACTIVE | -55 to 125 | 16.26 | 1ku | CFP (W) | 16 | 1 | TUBE |
SN54LS148 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54LS148J | TBD | A42 | N/A for Pkg Type | SN54LS148J | SN54LS148J |
| SNJ54LS148FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54LS148FK | SNJ54LS148FK |
| SNJ54LS148J | TBD | A42 | N/A for Pkg Type | SNJ54LS148J | SNJ54LS148J |
| SNJ54LS148W | TBD | A42 | N/A for Pkg Type | SNJ54LS148W | SNJ54LS148W |
SN54LS148 应用技术支持与电子电路设计开发资源下载
- SN54LS148 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)