SN54LS137 具有地址锁存器的 3 线路到 8 线路解码器/多路解复用器

The 'LS137 is a three-line to eight-line decoder/demultiplexer with latches on the three address inputs. When the latch-enable input (GL\) is low, the 'LS137 acts as a decoder/demultiplexer. When GL\ goes from low to high, the address present at the select inputs (A, B, and C) is stored in the latches. Further address changes are ignored as long as GL\ remains high. The output enable controls, G1 and G\2, control the state of the outputs independently of the select or latch-enable inputs. All of the outputs are high unless G1 is high and G\2 is low. The 'LS137 is ideally suited for implementing glitch-free decoders in strobed (stored-address) applications in bus-oriented systems.

	SN54LS137
Rating	Military
Technology Family	LS

SN54LS137 特性

• Combines Decoder and 3-Bit Address Latch
• Incorporates 2 Enable Inputs to Simplify Cascading
• Low Power Dissipation … 65 mW Typ

SN54LS137 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SNJ54LS137FK	ACTIVE	-55 to 125	11.77 | 1ku	LCCC (FK) | 20	1 | TUBE
SNJ54LS137J	ACTIVE	-55 to 125	2.49 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54LS137W	ACTIVE	-55 to 125	12.36 | 1ku	CFP (W) | 16	1 | TUBE

SN54LS137 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SNJ54LS137FK	TBD	POST-PLATE	N/A for Pkg Type	SNJ54LS137FK	SNJ54LS137FK
SNJ54LS137J	TBD	A42	N/A for Pkg Type	SNJ54LS137J	SNJ54LS137J
SNJ54LS137W	TBD	A42	N/A for Pkg Type	SNJ54LS137W	SNJ54LS137W

SN54LS137 应用技术支持与电子电路设计开发资源下载

1. SN54LS137 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)