SN54LS10-SP 三路 3 输入正与非门

These devices contain three independent 3-input NAND gates.

The SN5410, SN54LS10, and SN54S10 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN7410, SN74LS10 and SN74S10 are characterized for operation from 0°C to 70°C

	SN54LS10-SP
Rating	Space
Technology Family	LS

SN54LS10-SP 特性

• Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
• Dependable Texas Instruments Quality and Reliability

SN54LS10-SP 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
JM38510/30005SCA	ACTIVE	-55 to 125	142.98 | 1ku	CDIP (J) | 14	1 | TUBE
JM38510/30005SDA	ACTIVE	-55 to 125	142.98 | 1ku	CFP (W) | 14	1 | TUBE

SN54LS10-SP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
JM38510/30005SCA	TBD	A42	N/A for Pkg Type	JM38510/30005SCA	JM38510/30005SCA
JM38510/30005SDA	TBD	A42	N/A for Pkg Type	JM38510/30005SDA	JM38510/30005SDA

SN54LS10-SP 应用技术支持与电子电路设计开发资源下载

1. SN54LS10-SP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器门电路产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)