SN54HC590A 异步 14 级二进制计数器和振荡器

The 'HC590A devices contain an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features direct clear (CCLR)\ and count-enable (CCKEN)\ inputs. A ripple-carry output (RCO)\ is provided for cascading. Expansion is accomplished easily for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to the counter clock (CCLK) input of the following stage.

CCLK and the register clock (RCLK) inputs are positive-edge triggered. If both clocks are connected together, the counter state always is one count ahead of the register

	SN54HC590A
Rating	Military
Technology Family	HC

SN54HC590A 特性

• 2-V to 6-V VCC Operation
• High-Current 3-State Parallel Register Outputs Can Drive Up to 15 LSTTL Loads
• Low Power Consumption, 80-uA Max ICC
• Typical tpd = 14 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 uA Max
• 8-Bit Counter With Register
• Counter Has Direct Clear

SN54HC590A 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN54HC590AJ	ACTIVE	-55 to 125	1.91 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54HC590AFK	ACTIVE	-55 to 125	17.37 | 1ku	LCCC (FK) | 20	1 | TUBE
SNJ54HC590AJ	ACTIVE	-55 to 125	3.46 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54HC590AW	ACTIVE	-55 to 125	15.12 | 1ku	CFP (W) | 16	1 | TUBE

SN54HC590A 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN54HC590AJ	TBD	A42	N/A for Pkg Type	SN54HC590AJ	SN54HC590AJ
SNJ54HC590AFK	TBD	POST-PLATE	N/A for Pkg Type	SNJ54HC590AFK	SNJ54HC590AFK
SNJ54HC590AJ	TBD	A42	N/A for Pkg Type	SNJ54HC590AJ	SNJ54HC590AJ
SNJ54HC590AW	TBD	A42	N/A for Pkg Type	SNJ54HC590AW	SNJ54HC590AW

SN54HC590A 应用技术支持与电子电路设计开发资源下载

1. SN54HC590A 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)