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SN54HC175 具有清零功能的四路 D 类触发器

These positive-edge-triggered D-type flip-flops have a direct clear (CLR)\ input. The ’HC175 devices feature complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output

SN54HC175
Voltage Nodes(V) 6, 5, 2
Rating Military
SN54HC175 特性
SN54HC175 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN54HC175J ACTIVE -55 to 125 4.24 | 1ku CDIP (J) | 16 1 | TUBE  
SN54HC175 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN54HC175J TBD A42 N/A for Pkg Type SN54HC175J SN54HC175J
SN54HC175 应用技术支持与电子电路设计开发资源下载
  1. SN54HC175 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
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  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
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