SN54ALS253 具有三态输出的双路 4 选 1 数据选择器/多路复用器

These data selectors/multiplexers contain inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable () input. The output is disabled when is high.

The SN54ALS253 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS253 and SN74AS253A are characterized for operation from 0°C to 70°C

	SN54ALS253
Rating	Military
Technology Family	ALS

SN54ALS253 特性

• 3-State Versions of the 'ALS153 and SN74AS153
• Permits Multiplexing From n Lines to One Line
• Performs Parallel-to-Serial Conversion
• Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

SN54ALS253 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN54ALS253J	ACTIVE	-55 to 125	15.25 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54ALS253J	ACTIVE	-55 to 125	12.46 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54ALS253W	ACTIVE	-55 to 125	18.57 | 1ku	CFP (W) | 16	1 | TUBE

SN54ALS253 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN54ALS253J	TBD	Call TI	N/A for Pkg Type	SN54ALS253J	SN54ALS253J
SNJ54ALS253J	TBD	Call TI	N/A for Pkg Type	SNJ54ALS253J	SNJ54ALS253J
SNJ54ALS253W	TBD	A42	N/A for Pkg Type	SNJ54ALS253W	SNJ54ALS253W

SN54ALS253 应用技术支持与电子电路设计开发资源下载

1. SN54ALS253 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)