These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the ’ACT374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly
SN54ACT374-SP | |
Voltage Nodes(V) | 5 |
Technology Family | ACT |
Rating | Space |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
5962-8763101VRA | ACTIVE | -55 to 125 | 100.14 | 1ku | CDIP (J) | 20 | 1 | TUBE | |
5962-8763101VSA | ACTIVE | -55 to 125 | 100.14 | 1ku | CFP (W) | 20 | 1 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
5962-8763101VRA | TBD | A42 | N/A for Pkg Type | 5962-8763101VRA | 5962-8763101VRA |
5962-8763101VSA | TBD | Call TI | N/A for Pkg Type | 5962-8763101VSA | 5962-8763101VSA |