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SN54ABT823 具有三态输出的 10 位总线接口触发器

These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

With the clock-enable (CLKEN\) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, thus latching the outputs. Taking the clear (CLR\) input low causes the nine Q outputs to go low, independently of the clock.

A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic level) or a high-impedance state

SN54ABT823
Voltage Nodes(V) 5
Technology Family ABT
Rating Military
SN54ABT823 特性
SN54ABT823 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SNJ54ABT823FK ACTIVE -55 to 125 9.75 | 1ku LCCC (FK) | 28 1 | TUBE  
SNJ54ABT823J ACTIVE -55 to 125 5.95 | 1ku CDIP (J) | 24 1 | TUBE  
SNJ54ABT823W ACTIVE -55 to 125 10.35 | 1ku CFP (W) | 24 1 | TUBE  
SN54ABT823 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SNJ54ABT823FK TBD POST-PLATE N/A for Pkg Type SNJ54ABT823FK SNJ54ABT823FK
SNJ54ABT823J TBD A42 N/A for Pkg Type SNJ54ABT823J SNJ54ABT823J
SNJ54ABT823W TBD Call TI N/A for Pkg Type SNJ54ABT823W SNJ54ABT823W
SN54ABT823 应用技术支持与电子电路设计开发资源下载
  1. SN54ABT823 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
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