SN54ABT3614 具有总线匹配的 64 x 36 x 2 同步双向 FIFO 存储器
The SN54ABT3614 is a high-speed, low-power BiCMOS bidirectional clocked FIFO memory. It supports clock frequencies up to 50 MHz and has read-access times as fast as 12 ns. Two independent 64 \xD7 36 dual-port SRAM FIFOs in this device buffer data in opposite directions. Each FIFO has flags to indicate empty and full conditions and two programmable flags (almost full and almost empty) to indicate when a selected number of words is stored in memory. FIFO data on port B can be input and output in 36-bit, 18-bit, and 9-bit formats, with a choice of big- or little-endian configurations. Three modes of byte-order swapping are possible with any bus-size selection. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers.
|
SN54ABT3614 |
| Depth |
64 |
| Width |
36 |
| Fmax(MHz) |
50 |
| Sync/Async |
S |
| Voltage Nodes(V) |
5 |
| Vcc range(V) |
4.5 to 5.5 |
| Technology Family |
ABT |
| Output Drive(mA) |
|
| Rating |
Military |
SN54ABT3614 特性
- Free-Running CLKA and CLKB Can Be Asynchronous or Coincident
- Two Independent 64 \xD7 36 Clocked FIFOs Buffering Data in Opposite Directions
- Mailbox-Bypass Register for Each FIFO
- Dynamic Port-B Bus Sizing of 36 Bits (Long Word), 18 Bits (Word), and 9 Bits (Byte)
- Selection of Big- or Little-Endian Format for Word and Byte Bus Sizes
- Three Modes of Byte-Order Swapping on Port B
- Almost-Full and Almost-Empty Flags
- Microprocessor Interface Control Logic
- EFA\, FFA\, AEA\, and AFA\ Flags Synchronized by CLKA
- EFB\, FFB\, AEB\, and AFB\ Flags Synchronized by CLKB
- Passive Parity Checking on Each Port
- Parity Generation Can Be Selected for Each Port
- Low-Power Advanced BiCMOS Technology
- Supports Clock Frequencies up to 50 MHz
- Fast Access Times of 12 ns
- Released as DSCC SMD (Standard Microcircuit Drawing) 5962-9560901QYA and 5962-9560901NXD
- Package Options Include 132-Pin Ceramic Quad Flat (HFP) and 120-Pin Plastic Quad Flat (PCB) Packages
SN54ABT3614 芯片订购指南
| 器件 |
状态 |
温度 |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| 5962-9560901NXD |
ACTIVE |
-55 to 125 |
93.44 | 1ku |
HLQFP (PCB) | 120 |
90 | JEDEC TRAY (5+1) |
|
SN54ABT3614 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| 5962-9560901NXD |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
5962-9560901NXD |
5962-9560901NXD |
SN54ABT3614 应用技术支持与电子电路设计开发资源下载
- SN54ABT3614 数据资料 dataSheet 下载.PDF
- TI 德州仪器特殊逻辑产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)