P82B96 双路双向总线缓冲器
The P82B96 is a bipolar device that supports bidirectional data transfer between the normal I2C bus and a range of other bus configurations with different voltage and current levels. It can function as the interface without any limitations on the normal I2C operation and clock speed.
One of the advantages of the P82B96 is that it can isolate bus capacitance such that the total loading (devices and trace lengths) of the new bus or remote I2C nodes are not apparent to other I2C buses (or nodes). This device also adds minimal loading to I2C node where it is positioned. Any restrictions on the number of I2C devices in a system, or the physical separation between them, are virtually eliminated.
The P82B96 easily can transmit SDA/SCL signals via balanced transmission lines (twisted pairs) or with galvanic isolation (optocoupling), because separate directional Tx and Rx signals are provided. The Tx and Rx signals may be connected directly (without causing bus latching), to provide an alternative bidirectional signal line with I2C properties.
Two or more Sx or Sy I/Os must not be interconnected. The P82B96 design does not support this configuration. Bidirectional I2C signals do not allow any direction control pin so, instead, slightly different logic low-voltage levels are used at Sx/Sy to avoid latching of this buffer. A regular I2C low applied at the Rx/Ry of a P82B96 is propagated to Sx/Sy as a buffered low with a slightly higher voltage level. If this special buffered low is applied to the Sx/Sy of another P82B96, the second P82B96 does not recognize it as a regular I2C bus low and does not propagate it to its Tx/Ty output. The Sx/Sy side of P82B96 may not be connected to similar buffers that rely on special logic thresholds for their operation, such as the PCA9515A.
The Sx/Sy side is intended only for, and compatible with, the normal I2C logic voltage levels of I2C master and slave devices or Tx/Rx signals of a second P82B96, if required. The Tx/Rx and Ty/Ry I/O pins use the standard I2C logic voltage levels of all I2C parts. If Rx and Tx are connected, Sx can function as either the SDA or SCL line. Similarly, if Ry and Ty are connected, Sy can function as either the SDA or SCL line. There are no restrictions on the interconnection of the Tx/Rx and Ty/Ry I/O pins to other P82B96s, for example in a star or multi-point configuration with the Tx/Rx and Ty/Ry I/O pins on the common bus, and the Sx/Sy side connected to the line-card slave devices
| P82B96 | |
| No. of Outputs | 2 |
| VCC(Min)(V) | 2 |
| VCC(Max)(V) | 15 |
| Pin/Package | 8PDIP, 8SOIC, 8TSSOP, 8MSOP |
| Max Frequency(kHz) | 400 |
| Vcc range(V) | 2.0 to 15.0 |
| Channel Width | 2 |
| Master Side I2C Bus Capacitance Supported(pF) | 400 |
| Slave Side I2C Bus Capacitance Supported(pF) | 400 |
| 5V Tolerant I/O | Yes |
| Open–Drain I/O Type | Yes |
P82B96 特性
- Operating Power-Supply Voltage Range of 2 V to 15 V
- Can Interface Between I2C Buses Operating at Different Logic Levels (2 V to 15 V)
- Supports Bidirectional Data Transfer of I2C Bus Signals
- Allows Bus Capacitance of 400 pF on the Main I2C Bus (Sx/Sy Side) and 4000 pF on the Transmission Side (Tx/Ty)
- Outputs on the Transmission Side (Tx/Ty) Have High Sink Capability for Driving Low-Impedance or High-Capacitive Buses
- I2C Bus Signals Can Be Split Into Pairs of Forward (Tx/Ty) and Reverse (Rx/Ry) Signals for Interface With Optoelectrical Isolators and Similar Devices That Need Unidirectional Input and Output Signal Paths
- 400-kHz Fast I2C Bus Operation Over at Least 20 Meters of Wire
- Low Standby Current Consumption
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 3500-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
P82B96 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| P82B96D | ACTIVE | -40 to 85 | 1.90 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| P82B96DG4 | ACTIVE | -40 to 85 | 1.90 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| P82B96DGKR | ACTIVE | -40 to 85 | 1.60 | 1ku | MSOP (DGK) | 8 | 2500 | LARGE T&R | |
| P82B96DGKRG4 | ACTIVE | -40 to 85 | 1.60 | 1ku | MSOP (DGK) | 8 | 2500 | LARGE T&R | |
| P82B96DR | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R | |
| P82B96DRG4 | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R | |
| P82B96P | ACTIVE | -40 to 85 | 1.60 | 1ku | PDIP (P) | 8 | 50 | TUBE | |
| P82B96PE4 | ACTIVE | -40 to 85 | 1.60 | 1ku | PDIP (P) | 8 | 50 | TUBE | |
| P82B96PW | ACTIVE | -40 to 85 | 1.90 | 1ku | TSSOP (PW) | 8 | 150 | TUBE | |
| P82B96PWG4 | ACTIVE | -40 to 85 | 1.90 | 1ku | TSSOP (PW) | 8 | 150 | TUBE | |
| P82B96PWR | ACTIVE | -40 to 85 | 1.60 | 1ku | TSSOP (PW) | 8 | 2000 | LARGE T&R | |
| P82B96PWRG4 | ACTIVE | -40 to 85 | 1.60 | 1ku | TSSOP (PW) | 8 | 2000 | LARGE T&R |
P82B96 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| P82B96D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96D | P82B96D |
| P82B96DG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96DG4 | P82B96DG4 |
| P82B96DGKR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96DGKR | P82B96DGKR |
| P82B96DGKRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96DGKRG4 | P82B96DGKRG4 |
| P82B96DR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96DR | P82B96DR |
| P82B96DRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96DRG4 | P82B96DRG4 |
| P82B96P | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | P82B96P | P82B96P |
| P82B96PE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | P82B96PE4 | P82B96PE4 |
| P82B96PW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96PW | P82B96PW |
| P82B96PWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96PWG4 | P82B96PWG4 |
| P82B96PWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96PWR | P82B96PWR |
| P82B96PWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B96PWRG4 | P82B96PWRG4 |
P82B96 应用技术支持与电子电路设计开发资源下载
- P82B96 数据资料 dataSheet 下载.PDF
- TI 德州仪器I2C 逻辑器件产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
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- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)