P82B715 I2C 总线扩展器
The P82B715 is a bipolar device intended for I2C bus systems applications and supports bidirectional data transfer via the I2C bus. The P82B715 buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus and allows for extension of the I2C bus, while retaining all the operating modes and features of the I2C system.
In general, the I2C bus capacitance limit of 400 pF restricts practical communication distances to a few meters. One of the advantages of the P82B715 is that it can isolate bus capacitance such that the total loading (devices, connectors, traces and wires) of the new bus or remote I2C nodes are not apparent to other I2C buses (or nodes). This is achieved by using one P82B715 device at each end of a long cable. The pin Lx of one P82B715 device has to be connected to Lx of the second P82B715 (similarly for Ly). This allows the total system capacitance load to be around 3000 pF. The P82B715 uses unidirectional analog current amplification to increase the current sink capability of I2C chips by a factor of ten and to change the 400-pF I2C bus specification limit into a 4-nF bus wiring capacitance limit. That means longer cables or lower-cost general-purpose wiring may be used to connect two separate I2C-based systems, without worrying about the special voltage levels associated with other I2C bus buffers.
Multiple P82B715s can be connected together in a star or multipoint architecture by their Lx/Ly ports, without limit, as long as the total capacitance of the system remains less than about 3000 pF (400 pF or less when referenced to any Sx/Sy connection). In that arrangement, the master and/or slave devices are attached to the Sx/Sy port of each P82B715. The P82B715 alone does not support voltage-level translation, but it simplifies the application of low-cost transistors for this purpose. In normal use, the power-supply voltages at each end of the low-impedance buffered bus line should be the same. If these differ by a significant amount, noise margin is sacrificed.
Two or more Sx or Sy I/Os can be interconnected and are also fully compatible with bus buffers that use voltage-level offsets (such as the PCA9515A) because it duplicates and transmits the offset voltage
| P82B715 | |
| VCC(Min)(V) | 3 |
| VCC(Max)(V) | 12 |
| Pin/Package | 8PDIP, 8SOIC |
| Max Frequency(kHz) | 400 |
| Vcc range(V) | 3.0 to 12.0 |
| Channel Width | 2 |
| Master Side I2C Bus Capacitance Supported(pF) | 400 |
| Slave Side I2C Bus Capacitance Supported(pF) | 400 |
| 5V Tolerant I/O | Yes |
| Open–Drain I/O Type | Yes |
P82B715 特性
- Operating Power-Supply Voltage Range of 3 V to 12 V
- Supports Bidirectional Data Transfer of I2C Bus Signals
- Allows Bus Capacitance of 400 pF on Main I2C Bus (Sx/Sy Side) and 3000 pF on Transmission Side (Lx/Ly Side)
- Dual Bidirectional Unity-Voltage-Gain Buffer With No External Directional Control Required
- Drives 10× Lower-Impedance Bus Wiring for Improved Noise Immunity
- Multi-Drop Distribution of I2C Signals Using Low-Cost Twisted-Pair Cables
- I2C Bus Operation Over 50 Meters of Twisted-Pair Wire
- Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2500-V Human-Body Model (A114-A)
- 400-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
P82B715 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| P82B715D | ACTIVE | -40 to 85 | 1.90 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| P82B715DG4 | ACTIVE | -40 to 85 | 1.90 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| P82B715DR | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R | |
| P82B715DRG4 | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R | |
| P82B715P | ACTIVE | -40 to 85 | 1.60 | 1ku | PDIP (P) | 8 | 50 | TUBE | |
| P82B715PE4 | ACTIVE | -40 to 85 | 1.60 | 1ku | PDIP (P) | 8 | 50 | TUBE |
P82B715 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| P82B715D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B715D | P82B715D |
| P82B715DG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B715DG4 | P82B715DG4 |
| P82B715DR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B715DR | P82B715DR |
| P82B715DRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | P82B715DRG4 | P82B715DRG4 |
| P82B715P | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | P82B715P | P82B715P |
| P82B715PE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | P82B715PE4 | P82B715PE4 |
P82B715 应用技术支持与电子电路设计开发资源下载
- P82B715 数据资料 dataSheet 下载.PDF
- TI 德州仪器I2C 逻辑器件产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)