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CY74FCT2373T 具有三态输出和串联阻尼电阻的八路 D 类透明锁存器

The CY74FCT2373T is an 8-bit, high-speed CMOS, TTL-compatible buffered latch with 3-state outputs that is ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25- termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2373T can replace the CY74FCT373T to reduce noise in an existing design.

When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches

CY74FCT2373T
Voltage Nodes(V) 5
Rating Catalog
CY74FCT2373T 特性
CY74FCT2373T 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
CY74FCT2373TSOC ACTIVE -40 to 85 0.48 | 1ku SOIC (DW) | 20 25 | TUBE  
CY74FCT2373TSOCE4 ACTIVE -40 to 85 0.48 | 1ku SOIC (DW) | 20 25 | TUBE  
CY74FCT2373TSOCG4 ACTIVE -40 to 85 0.48 | 1ku SOIC (DW) | 20 25 | TUBE  
CY74FCT2373TSOCT ACTIVE -40 to 85 0.85 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
CY74FCT2373T 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CY74FCT2373TSOC Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT2373TSOC CY74FCT2373TSOC
CY74FCT2373TSOCE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT2373TSOCE4 CY74FCT2373TSOCE4
CY74FCT2373TSOCG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT2373TSOCG4 CY74FCT2373TSOCG4
CY74FCT2373TSOCT Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT2373TSOCT CY74FCT2373TSOCT
CY74FCT2373T 应用技术支持与电子电路设计开发资源下载
  1. CY74FCT2373T 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)