CD74HCT390 高速 CMOS 逻辑双路十进制纹波计数器
The CD74HC390 and ’HCT390 dual 4-bit decade ripple counters are high-speed silicon-gate CMOS devices and are pin compatible with low-power Schottky TTL (LSTTL). These devices are divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections are normally used in a BCD decade or bi quinary configuration, since they share a common master reset (nMR). If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting configurations are possible within one package. The separate clock inputs (nCP0\ and nCP1\) of each section allow ripple counter or frequency division applications of divide-by-2, 4.
CD74HCT390 特性
- Two BCD Decade or Bi-Quinary Counters
- One Package Can Be Configured to Divide-by-2, 4, 5,10, 20, 25, 50 or 100
- Two Master Reset Inputs to Clear Each Decade Counter Individually
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range... -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 
1uA at VOL, VOH
CD74HCT390 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD74HCT390E |
ACTIVE |
-55 to 125 |
0.40 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
|
| CD74HCT390EE4 |
ACTIVE |
-55 to 125 |
0.40 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
|
| CD74HCT390M |
ACTIVE |
-55 to 125 |
0.44 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
|
| CD74HCT390M96 |
ACTIVE |
-55 to 125 |
0.36 | 1ku |
SOIC (D) | 16 |
2500 | LARGE T&R |
|
| CD74HCT390M96E4 |
ACTIVE |
-55 to 125 |
0.36 | 1ku |
SOIC (D) | 16 |
2500 | LARGE T&R |
|
| CD74HCT390M96G4 |
ACTIVE |
-55 to 125 |
0.36 | 1ku |
SOIC (D) | 16 |
2500 | LARGE T&R |
|
| CD74HCT390ME4 |
ACTIVE |
-55 to 125 |
0.44 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
|
| CD74HCT390MG4 |
ACTIVE |
-55 to 125 |
0.44 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
|
CD74HCT390 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD74HCT390E |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD74HCT390E |
CD74HCT390E |
| CD74HCT390EE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD74HCT390EE4 |
CD74HCT390EE4 |
| CD74HCT390M |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390M |
CD74HCT390M |
| CD74HCT390M96 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390M96 |
CD74HCT390M96 |
| CD74HCT390M96E4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390M96E4 |
CD74HCT390M96E4 |
| CD74HCT390M96G4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390M96G4 |
CD74HCT390M96G4 |
| CD74HCT390ME4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390ME4 |
CD74HCT390ME4 |
| CD74HCT390MG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HCT390MG4 |
CD74HCT390MG4 |
CD74HCT390 应用技术支持与电子电路设计开发资源下载
- CD74HCT390 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)