CD74HC85 高速 CMOS 逻辑 4 位幅度比较器

The ’HC85 and ’HCT85 are high speed magnitude comparators that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These 4-bit devices compare two binary, BCD, or other monotonic codes and present the three possible magnitude results at the outputs (A > B, A < B, and A = B). The 4-bit input words are weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits.

The devices are expandable without external gating, in both serial and parallel fashion. The upper part of the truth table indicates operation using a single device or devices in a serially expanded application. The parallel expansion scheme is described by the last three entries in the truth table

	CD74HC85
Rating	Catalog
Technology Family	HCT

CD74HC85 特性

Buffered Inputs and Outputs
Typical Propagation Delay: 13ns (Data to Output at VCC = 5V, CL = 15pF, TA = 25°C
Serial or Parallel Expansion Without External Gating
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . –55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1uA at VOL, VOH

CD74HC85 芯片订购指南

器件	状态	温度	价格	封装 \| 引脚	封装数量 \| 封装载体	丝印标记
CD74HC85E	ACTIVE	-55 to 125	0.80 \| 1ku	PDIP (N) \| 16	25 \| TUBE
CD74HC85EE4	ACTIVE	-55 to 125	0.80 \| 1ku	PDIP (N) \| 16	25 \| TUBE
CD74HC85M	ACTIVE	-55 to 125	0.90 \| 1ku	SOIC (D) \| 16	40 \| TUBE
CD74HC85M96	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	2500 \| LARGE T&R
CD74HC85M96E4	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	2500 \| LARGE T&R
CD74HC85M96G4	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	2500 \| LARGE T&R
CD74HC85ME4	ACTIVE	-55 to 125	0.90 \| 1ku	SOIC (D) \| 16	40 \| TUBE
CD74HC85MG4	ACTIVE	-55 to 125	0.90 \| 1ku	SOIC (D) \| 16	40 \| TUBE

CD74HC85 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD74HC85E	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD74HC85E	CD74HC85E
CD74HC85EE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD74HC85EE4	CD74HC85EE4
CD74HC85M	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85M	CD74HC85M
CD74HC85M96	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85M96	CD74HC85M96
CD74HC85M96E4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85M96E4	CD74HC85M96E4
CD74HC85M96G4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85M96G4	CD74HC85M96G4
CD74HC85ME4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85ME4	CD74HC85ME4
CD74HC85MG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HC85MG4	CD74HC85MG4

CD74HC85 应用技术支持与电子电路设计开发资源下载

CD74HC85 数据资料 dataSheet 下载.PDF
TI 德州仪器MSI 功能产品选型与价格 . xls
Logic Guide 2009 (PDF 4263 KB)
Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
CMOS Power Consumption and CPD Calculation (PDF 89 KB)
Designing With Logic (PDF 186 KB)
Live Insertion (PDF 150 KB)
Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
LOGIC Pocket Data Book (PDF 6001 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
Logic Cross-Reference (PDF 2938 KB)