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CD74HC393 高速 CMOS 逻辑 4 级二进制计数器

The ’HC393 and ’HCT393 are 4-stage ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of the stage advances one count on the negative transition of each clock pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

CD74HC393
Rating Catalog
Technology Family HC
CD74HC393 特性
CD74HC393 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD74HC393E ACTIVE -55 to 125 0.39 | 1ku PDIP (N) | 14 25 | TUBE  
CD74HC393EE4 ACTIVE -55 to 125 0.39 | 1ku PDIP (N) | 14 25 | TUBE  
CD74HC393M ACTIVE -55 to 125 0.42 | 1ku SOIC (D) | 14 40 | TUBE  
CD74HC393M96 ACTIVE -55 to 125 0.35 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
CD74HC393M96E4 ACTIVE -55 to 125 0.35 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
CD74HC393M96G4 ACTIVE -55 to 125 0.35 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
CD74HC393ME4 ACTIVE -55 to 125 0.42 | 1ku SOIC (D) | 14 40 | TUBE  
CD74HC393MG4 ACTIVE -55 to 125 0.42 | 1ku SOIC (D) | 14 40 | TUBE  
CD74HC393 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD74HC393E Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type CD74HC393E CD74HC393E
CD74HC393EE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type CD74HC393EE4 CD74HC393EE4
CD74HC393M Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393M CD74HC393M
CD74HC393M96 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393M96 CD74HC393M96
CD74HC393M96E4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393M96E4 CD74HC393M96E4
CD74HC393M96G4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393M96G4 CD74HC393M96G4
CD74HC393ME4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393ME4 CD74HC393ME4
CD74HC393MG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC393MG4 CD74HC393MG4
CD74HC393 应用技术支持与电子电路设计开发资源下载
  1. CD74HC393 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)