CD74HC192 高速 CMOS 逻辑可预设的同步 4 位 BCD 码十进制加/减计数器
The ’HC192, ’HC193 and ’HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.
Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL)\. The counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the Clock-Down input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input). A high level on the MR input overrides any other input to clear the counter to its zero state. The Terminal Count up (carry) goes low half a clock period before the zero count is reached and returns to a high level at the zero count
| CD74HC192 | |
| Rating | Catalog |
| Technology Family | HC |
CD74HC192 特性
- Synchronous Counting and Asynchronous Loading
- Two Outputs for N-Bit Cascading
- Look-Ahead Carry for High-Speed Counting
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1uA at VOL, VOH
CD74HC192 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD74HC192E | ACTIVE | -55 to 125 | 0.90 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74HC192EE4 | ACTIVE | -55 to 125 | 0.90 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74HC192NSR | ACTIVE | -55 to 125 | 0.90 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R | |
| CD74HC192NSRE4 | ACTIVE | -55 to 125 | 0.90 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R | |
| CD74HC192NSRG4 | ACTIVE | -55 to 125 | 0.90 | 1ku | SO (NS) | 16 | 2000 | LARGE T&R |
CD74HC192 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD74HC192E | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HC192E | CD74HC192E |
| CD74HC192EE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HC192EE4 | CD74HC192EE4 |
| CD74HC192NSR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC192NSR | CD74HC192NSR |
| CD74HC192NSRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC192NSRE4 | CD74HC192NSRE4 |
| CD74HC192NSRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC192NSRG4 | CD74HC192NSRG4 |
CD74HC192 应用技术支持与电子电路设计开发资源下载
- CD74HC192 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)