CD74HC173 具有三态输出的高速 CMOS 逻辑四路 D 类触发器
The ’HC173 and ’HCT173 high speed three-state quad Dtype flip-flops are fabricated with silicon gate CMOS technology. They possess the low power consumption of standard CMOS Integrated circuits, and can operate at speeds comparable to the equivalent low power Schottky devices. The buffered outputs can drive 15 LSTTL loads. The large output drive capability and three-state feature make these parts ideally suited for interfacing with bus lines in bus oriented systems.
The four D-type flip-flops operate synchronously from a common clock. The outputs are in the three-state mode when either of the two output disable pins are at the logic "1" level. The input ENABLES allow the flip-flops to remain in their present states without having to disrupt the clock If either of the 2 input ENABLES are taken to a logic "1" level, the Q outputs are fed back to the inputs, forcing the flip-flops to remain in the same state.
|
CD74HC173 |
| Technology Family |
HC |
| Rating |
Catalog |
CD74HC173 特性
- Three-State Buffered Outputs
- Gated Input and Output Enables
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range... –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1uA at VOL, VOH
CD74HC173 芯片订购指南
| 器件 |
状态 |
温度 |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD74HC173E |
ACTIVE |
-55 to 125 |
0.60 | 1ku |
PDIP (N) | 16 |
20 | TUBE |
|
| CD74HC173EE4 |
ACTIVE |
-55 to 125 |
0.60 | 1ku |
PDIP (N) | 16 |
20 | TUBE |
|
| CD74HC173M |
ACTIVE |
-55 to 125 |
0.65 | 1ku |
SOIC (DW) | 16 |
25 | TUBE |
|
| CD74HC173M96 |
ACTIVE |
-55 to 125 |
0.55 | 1ku |
SOIC (DW) | 16 |
2000 | LARGE T&R |
|
| CD74HC173M96E4 |
ACTIVE |
-55 to 125 |
0.55 | 1ku |
SOIC (DW) | 16 |
2000 | LARGE T&R |
|
| CD74HC173M96G4 |
ACTIVE |
-55 to 125 |
0.55 | 1ku |
SOIC (DW) | 16 |
2000 | LARGE T&R |
|
| CD74HC173ME4 |
ACTIVE |
-55 to 125 |
0.65 | 1ku |
SOIC (DW) | 16 |
25 | TUBE |
|
| CD74HC173MG4 |
ACTIVE |
-55 to 125 |
0.65 | 1ku |
SOIC (DW) | 16 |
25 | TUBE |
|
CD74HC173 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD74HC173E |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD74HC173E |
CD74HC173E |
| CD74HC173EE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD74HC173EE4 |
CD74HC173EE4 |
| CD74HC173M |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173M |
CD74HC173M |
| CD74HC173M96 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173M96 |
CD74HC173M96 |
| CD74HC173M96E4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173M96E4 |
CD74HC173M96E4 |
| CD74HC173M96G4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173M96G4 |
CD74HC173M96G4 |
| CD74HC173ME4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173ME4 |
CD74HC173ME4 |
| CD74HC173MG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC173MG4 |
CD74HC173MG4 |
CD74HC173 应用技术支持与电子电路设计开发资源下载
- CD74HC173 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)