CD74FCT843A 具有三态输出的八进制透明同向锁存器

The CD74FCT843A is a 9-bit, bus-interface, D-type latch with 3-state outputs, designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The device uses a small-geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48 mA

	CD74FCT843A
Technology Family	AC
Rating	Catalog

CD74FCT843A 特性

• BiCMOS Technology With Low Quiescent Power
• Buffered Inputs
• Noninverted Outputs
• Input/Output Isolation From VCC
• Controlled Output Edge Rates
• 48-mA Output Sink Current
• Output Voltage Swing Limited to 3.7 V
• SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
• Packaged in Plastic Small-Outline Package

CD74FCT843A 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
CD74FCT843AM	ACTIVE	0 to 70	7.00 | 1ku	SOIC (DW) | 24	25 | TUBE
CD74FCT843AME4	ACTIVE	0 to 70	7.00 | 1ku	SOIC (DW) | 24	25 | TUBE
CD74FCT843AMG4	ACTIVE	0 to 70	7.00 | 1ku	SOIC (DW) | 24	25 | TUBE

CD74FCT843A 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD74FCT843AM	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74FCT843AM	CD74FCT843AM
CD74FCT843AME4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74FCT843AME4	CD74FCT843AME4
CD74FCT843AMG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74FCT843AMG4	CD74FCT843AMG4

CD74FCT843A 应用技术支持与电子电路设计开发资源下载

1. CD74FCT843A 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)