CD74ACT175 具有复位功能的六路 D 类触发器
This positive-edge-triggered D-type flip-flop has a direct clear (CLR)\ input. The CD74ACT175 features complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output
| CD74ACT175 | |
| Technology Family | AC |
| Rating | Catalog |
CD74ACT175 特性
- Inputs Are TTL-Voltage Compatible
- Contains Four Flip-Flops With Double-Rail Outputs
- Buffered Inputs
- Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
- Balanced Propagation Delays
- ±24-mA Output Drive Current
- Fanout to 15 F Devices
- SCR-Latchup-Resistant CMOS Process and Circuit Design
- Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
- Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
CD74ACT175 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD74ACT175E | ACTIVE | -55 to 125 | 0.55 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74ACT175EE4 | ACTIVE | -55 to 125 | 0.55 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74ACT175M | ACTIVE | -55 to 125 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| CD74ACT175M96 | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74ACT175M96E4 | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74ACT175M96G4 | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74ACT175ME4 | ACTIVE | -55 to 125 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| CD74ACT175MG4 | ACTIVE | -55 to 125 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE |
CD74ACT175 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD74ACT175E | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74ACT175E | CD74ACT175E |
| CD74ACT175EE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74ACT175EE4 | CD74ACT175EE4 |
| CD74ACT175M | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175M | CD74ACT175M |
| CD74ACT175M96 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175M96 | CD74ACT175M96 |
| CD74ACT175M96E4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175M96E4 | CD74ACT175M96E4 |
| CD74ACT175M96G4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175M96G4 | CD74ACT175M96G4 |
| CD74ACT175ME4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175ME4 | CD74ACT175ME4 |
| CD74ACT175MG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74ACT175MG4 | CD74ACT175MG4 |
CD74ACT175 应用技术支持与电子电路设计开发资源下载
- CD74ACT175 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)