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CD54HCT164 高速 CMOS 逻辑 8 位串行输入/并行输出移位寄存器

The ’HC164 and ’HCT164 are 8-bit serial-in parallel-out shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CP). A LOW on the Master Reset (MR\) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (DS1 and DS2) are provided, either one can be used as a Data Enable control.

CD54HCT164
Voltage Nodes(V) 6, 5, 2
Technology Family HCT
Rating Military
CD54HCT164 特性
CD54HCT164 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD54HCT164F ACTIVE -55 to 125 5.09 | 1ku CDIP (JT) | 14 1 | TUBE  
CD54HCT164F3A ACTIVE -55 to 125 5.91 | 1ku CDIP (JT) | 14 1 | TUBE  
CD54HCT164 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD54HCT164F TBD A42 N/A for Pkg Type CD54HCT164F CD54HCT164F
CD54HCT164F3A TBD A42 N/A for Pkg Type CD54HCT164F3A CD54HCT164F3A
CD54HCT164 应用技术支持与电子电路设计开发资源下载
  1. CD54HCT164 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)