CD54HC574 具有三态输出的高速 CMOS 逻辑八路上升沿 D 类触发器
The ’HC374, ’HCT374, ’HC574, and ’HCT574 are octal D-type flip-flops with 3-state outputs and the capability to drive 15 LSTTL loads. The eight edge-triggered flip-flops enter data into their registers on the LOW to HIGH transition of clock (CP). The output enable (OE) controls the 3-state outputs and is independent of the register operation. When OE is HIGH\, the outputs are in the high-impedance state. The 374 and 574 are identical in function and differ only in their pinout arrangements
|
CD54HC574 |
Voltage Nodes(V) |
6, 5, 2 |
Technology Family |
HC |
Rating |
Military |
CD54HC574 特性
- Buffered Inputs
- Common Three-State Output Enable Control
- Three-State Outputs
- Bus Line Driving Capability
- Typical Propagation Delay (Clock to Q) = 15ns at VCC = 5V, CL = 15pF, TA = 25°C
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range...–55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1uA at VOL, VOH
CD54HC574 芯片订购指南
器件 |
状态 |
温度 |
价格(美元) |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
CD54HC574F |
ACTIVE |
-55 to 125 |
1.83 | 1ku |
CDIP (J) | 20 |
1 | TUBE |
|
CD54HC574F3A |
ACTIVE |
-55 to 125 |
4.73 | 1ku |
CDIP (J) | 20 |
1 | TUBE |
|
CD54HC574 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
CD54HC574F |
TBD |
A42 |
N/A for Pkg Type |
CD54HC574F |
CD54HC574F |
CD54HC574F3A |
TBD |
A42 |
N/A for Pkg Type |
CD54HC574F3A |
CD54HC574F3A |
CD54HC574 应用技术支持与电子电路设计开发资源下载
- CD54HC574 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)