CD54ACT257 具有三态输出的四路同向 2 输入多路复用器

The ’AC257, ’ACT257 and CD74ACT258 are quad 2-input multiplexers with three-state outputs that utilize Advanced CMOS Logic technology. Each of these devices selects four bits of data from two sources under the control of a common Select input (S). The Output Enable (OE\) is active LOW. When OE\ is HIGH, all of the outputs (Y or Y\) are in the high-impedance state regardless of all other input conditions.

Moving data from two groups of registers to four common output buses is a common use of the ’AC257, ’ACT257, and CD74ACT258. The state of the Select input determines the particular register from which the data comes. The ’AC257, ’ACT257 and CD74ACT258 can also be used as function generators

	CD54ACT257
Rating	Military
Technology Family	ACT

CD54ACT257 特性

• ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs
• CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs
• Buffered Inputs
• Typical Propagation Delay
  - 4.4ns at VCC = 5V, TA = 25°C, CL = 50pF
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• SCR-Latchup-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FASTTM/AS/S with Significantly Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current
  - Fanout to 15 FASTTM ICs
  Drives 50 Transmission Lines
• Characterized for operation from –40° to 85°C

CD54ACT257 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
CD54ACT257F3A	ACTIVE	-55 to 125	5.05 | 1ku	CDIP (JT) | 16	1 | TUBE

CD54ACT257 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD54ACT257F3A	TBD	A42	N/A for Pkg Type	CD54ACT257F3A	CD54ACT257F3A

CD54ACT257 应用技术支持与电子电路设计开发资源下载

1. CD54ACT257 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)