CD4076B CMOS 具有时钟和三态输出的 CMOS 4 位 D 类寄存器
CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the clock input. Output Disable inputs are also provided. When the Output Disable inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and present a high impedance.
The CD4076B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
|
CD4076B |
| Voltage Nodes(V) |
5, 10, 15 |
| Rating |
Military |
| Technology Family |
CD4000 |
CD4076B 特性
- Three-state outputs
- Input disabled without gating the clock
- Gated output control lines for enabling or disabling the outputs
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
- Noise margin over full package temperature range:
- 1 V at VDD = 5 V
- 2 V at VDD = 10 V
- 2.5 V at VDD = 15 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
CD4076B 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD4076BE |
ACTIVE |
-55 to 125 |
0.33 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
CD4076BE |
| CD4076BEE4 |
ACTIVE |
-55 to 125 |
0.33 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
CD4076BE |
| CD4076BM |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
CD4076BM |
| CD4076BME4 |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
CD4076BM |
| CD4076BMG4 |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
SOIC (D) | 16 |
40 | TUBE |
CD4076BM |
| CD4076BMT |
ACTIVE |
-55 to 125 |
0.75 | 1ku |
SOIC (D) | 16 |
250 | SMALL T&R |
CD4076BM |
| CD4076BMTE4 |
ACTIVE |
-55 to 125 |
0.75 | 1ku |
SOIC (D) | 16 |
250 | SMALL T&R |
CD4076BM |
| CD4076BMTG4 |
ACTIVE |
-55 to 125 |
0.75 | 1ku |
SOIC (D) | 16 |
250 | SMALL T&R |
CD4076BM |
| CD4076BPW |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
CM076B |
| CD4076BPWE4 |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
CM076B |
| CD4076BPWG4 |
ACTIVE |
-55 to 125 |
0.34 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
CM076B |
CD4076B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD4076BE |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4076BE |
CD4076BE |
| CD4076BEE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4076BEE4 |
CD4076BEE4 |
| CD4076BM |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BM |
CD4076BM |
| CD4076BME4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BME4 |
CD4076BME4 |
| CD4076BMG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BMG4 |
CD4076BMG4 |
| CD4076BMT |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BMT |
CD4076BMT |
| CD4076BMTE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BMTE4 |
CD4076BMTE4 |
| CD4076BMTG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BMTG4 |
CD4076BMTG4 |
| CD4076BPW |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BPW |
CD4076BPW |
| CD4076BPWE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BPWE4 |
CD4076BPWE4 |
| CD4076BPWG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4076BPWG4 |
CD4076BPWG4 |
CD4076B 应用技术支持与电子电路设计开发资源下载
- CD4076B 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
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- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)