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CD4034B CMOS 8 级静态双向并行/串行输入/输出总线寄存器

CD4034B is a static eight-stage parallel-or serial-input parallel-output register. It can be used to:

1) bidirectionally transfer parallel information between two buses, 2) convert serial data to parallel form and direct the parallel data to either of two buses, 3) store (recirculate) parallel data, or 4) accept parallel data from either of two buses and convert that data to serial form. Input that control the operations include a single-phase CLOCK (CL), A DATA ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS (A/S), A-BUS-TO-B-BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/SERIAL (P/S).

Data inputs include 16 bidirectional parallel data lines of which the eight A data lines are inputs (3-state outputs) and the B data lines are outputs (inputs) depending on the signal level on the A/B input

CD4034B
Voltage Nodes(V) 5, 10, 15
Technology Family CD4000
Rating Catalog
CD4034B 特性
CD4034B 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD4034BE ACTIVE -55 to 125 0.35 | 1ku PDIP (N) | 24 25 | TUBE CD4034BE
CD4034BEE4 ACTIVE -55 to 125 0.35 | 1ku PDIP (N) | 24 25 | TUBE CD4034BE
CD4034BM ACTIVE -55 to 125 0.36 | 1ku SOIC(DW) | 24 40 | TUBE CD4034BM
CD4034BME4 ACTIVE -55 to 125 0.36 | 1ku SOIC(DW) | 24 40 | TUBE CD4034BM
CD4034BMG4 ACTIVE -55 to 125 0.36 | 1ku SOIC(DW) | 24 40 | TUBE CD4034BM
CD4034B 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD4034BE Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type CD4034BE CD4034BE
CD4034BEE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type CD4034BEE4 CD4034BEE4
CD4034BM Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD4034BM CD4034BM
CD4034BME4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD4034BME4 CD4034BME4
CD4034BMG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD4034BMG4 CD4034BMG4
CD4034B 应用技术支持与电子电路设计开发资源下载
  1. CD4034B 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)