CD40107B-MIL CMOS 二路 2 输入与非门缓冲器/驱动器
The CD40107B is a dual 2-input NAND buffer/driver containing two independent 2-input NAND buffers with open-drain single n-channel transistor outputs. This device features a wired-OR capability and high output sink current capability (136 mA typ. at VDD = 10 V, VDS= 1 V). The CD40107B is supplied in 8-lead hermetic dual-in-line ceramic packages (F3A suffix), 8-lead dual-in-line plastic packages (E suffix), 8-lead small-outline packages (M, M96, MT, and PSR suffixes), and 8-lead thin shrink small-outline packages (PW and PWR suffixes).
|
CD40107B-MIL |
| Voltage Nodes(V) |
5, 10, 15 |
| Rating |
Catalog |
| Technology Family |
CD4000 |
CD40107B-MIL 特性
- 32 times standard B-Series output current drive sinking capability - 136 mA typ. @ VDD = 10 V, VDS = 1 V
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- 5-V, 10-V, and 15-V parametric ratings
- Noise margin, full package temperature range, RL to VDD = 10 k
:
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications
- Driving relays, lamps, LEDs
- Line driver
- Level shifter (up or down)
CD40107B-MIL 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD40107BF |
ACTIVE |
-55 to 125 |
4.33 | 1ku |
CDIP (J) | 14 |
1 | TUBE |
CD40107BF |
| CD40107BF3A |
ACTIVE |
-55 to 125 |
5.03 | 1ku |
CDIP (J) | 14 |
1 | TUBE |
CD40107BF |
CD40107B-MIL 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD40107BF |
TBD |
A42 |
N/A for Pkg Type |
CD40107BF |
CD40107BF |
| CD40107BF3A |
TBD |
A42 |
N/A for Pkg Type |
CD40107BF3A |
CD40107BF3A |
CD40107B-MIL 应用技术支持与电子电路设计开发资源下载
- CD40107B-MIL 数据资料 dataSheet 下载.PDF
- TI 德州仪器门电路产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)