CD40102B CMOS 8 级可预置二 - 十进制 BCD 同步递减计数器

CD40102B, and CD40103B consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The CD40102B is configured as two cascaded 4-bit BCD counters, and the CD40103B contains a single 8-bit binary counter. Each type has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT/ZERO-DEFECT output are active-low logic.

In normal operation, the counter is decremented by one count on each positive transition of the CLOCK. Counting is inhibited when the CARRY-IN/COUNTER ENABLE (CI/CE)\ input is high. The CARRY-OUT/ZERO-DEFECT (CO/ZD)\ output goes low when the count reaches zero if the CI/CE\ input is low, and remains low for one full clock period

	CD40102B
Voltage Nodes(V)	5, 10, 15
Rating	Catalog
Technology Family	CD4000

CD40102B 特性

• Synchronous or asynchronous preset
• Medium-speed operation: fCL = 3.6 MHz (typ.) @ VDD = 10V
• Cascadable
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) =
  1 V at VDD = 5 V
  2 V at VDD = 10 V
  2.5 V at VDD = 15 V
• Standardized, symmetrical output characteristics
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
• Applications:
  • Divide-by-"N" counters
  • Programmable timers
  • Interrupt timers
  • Cycle/program counter

CD40102B - 2-Decade BCD Type
CD40103B - 8-Bit Binary Type

CD40102B 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
CD40102BE	ACTIVE	-55 to 125	1.20 | 1ku	PDIP (N) | 16	25 | TUBE
CD40102BEE4	ACTIVE	-55 to 125	1.20 | 1ku	PDIP (N) | 16	25 | TUBE
CD40102BNSR	ACTIVE	-55 to 125	1.15 | 1ku	SO (NS) | 16	2000 | LARGE T&R
CD40102BNSRE4	ACTIVE	-55 to 125	1.15 | 1ku	SO (NS) | 16	2000 | LARGE T&R
CD40102BNSRG4	ACTIVE	-55 to 125	1.15 | 1ku	SO (NS) | 16	2000 | LARGE T&R
CD40102BPW	ACTIVE	-55 to 125	1.20 | 1ku	TSSOP (PW) | 16	90 | TUBE
CD40102BPWE4	ACTIVE	-55 to 125	1.20 | 1ku	TSSOP (PW) | 16	90 | TUBE
CD40102BPWG4	ACTIVE	-55 to 125	1.20 | 1ku	TSSOP (PW) | 16	90 | TUBE
CD40102BPWR	ACTIVE	-55 to 125	1.15 | 1ku	TSSOP (PW) | 16	2000 | LARGE T&R
CD40102BPWRE4	ACTIVE	-55 to 125	1.15 | 1ku	TSSOP (PW) | 16	2000 | LARGE T&R
CD40102BPWRG4	ACTIVE	-55 to 125	1.15 | 1ku	TSSOP (PW) | 16	2000 | LARGE T&R

CD40102B 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD40102BE	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD40102BE	CD40102BE
CD40102BEE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD40102BEE4	CD40102BEE4
CD40102BNSR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BNSR	CD40102BNSR
CD40102BNSRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BNSRE4	CD40102BNSRE4
CD40102BNSRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BNSRG4	CD40102BNSRG4
CD40102BPW	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPW	CD40102BPW
CD40102BPWE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPWE4	CD40102BPWE4
CD40102BPWG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPWG4	CD40102BPWG4
CD40102BPWR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPWR	CD40102BPWR
CD40102BPWRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPWRE4	CD40102BPWRE4
CD40102BPWRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD40102BPWRG4	CD40102BPWRG4

CD40102B 应用技术支持与电子电路设计开发资源下载

1. CD40102B 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)