ADS6142 具有可选并行 CMOS 或 LVDS 输出的低功耗 14 位 65MSPS ADC
ADS6145/ADS6144/ADS6143/ADS6142 (ADS614X) are a family of 14-bit A/D converters with sampling frequencies up to 125 MSPS. The high performance and low power consumption of the ADS614X are combined in a compact 32 QFN package. An internal high bandwidth sample and hold and a low jitter clock buffer help to achieve high SNR and high SFDR even at high input frequencies.
The ADS614X feature coarse and fine gain options to improve SFDR performance at lower full-scale analog input ranges.
The digital data outputs are either parallel CMOS or DDR (Double Data Rate) LVDS. Several features exist to ease data capture such as — controls for output clock position and output buffer drive strength, LVDS current, and internal termination programmability.
|
ADS6122 |
ADS6123 |
ADS6124 |
ADS6125 |
ADS6142 |
ADS6143 |
ADS6144 |
ADS6145 |
| Resolution(Bits) |
12 |
12 |
12 |
12 |
14 |
14 |
14 |
14 |
| Sample Rate (max) |
65MSPS |
80MSPS |
105MSPS |
125MSPS |
65MSPS |
80MSPS |
105MSPS |
125MSPS |
| Architecture |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
| Power Consumption(Typ)(mW) |
285 |
318 |
374 |
417 |
285 |
318 |
374 |
417 |
| SINAD(dB) |
71.5 |
71.3 |
71 |
70.6 |
74.4 |
74.3 |
73.2 |
72.7 |
| SNR(dB) |
71.6 |
71.5 |
71.3 |
71.3 |
74.6 |
74.4 |
74.1 |
74.1 |
| SFDR(dB) |
89 |
89 |
83 |
80 |
86 |
89 |
84 |
84 |
| DNL(Max)(+/-LSB) |
2 |
2 |
2 |
2 |
0.95 |
0.95 |
0.95 |
0.95 |
| INL(Max)(+/-LSB) |
2 |
2 |
2 |
2 |
3.5 |
3.5 |
4.5 |
4.5 |
| No Missing Codes(Bits) |
12 |
12 |
12 |
12 |
14 |
14 |
14 |
14 |
| ENOB(Bits) |
11.6 |
11.6 |
11.5 |
11.4 |
12 |
12 |
11.8 |
11.7 |
| No. of Supplies |
2 |
2 |
2 |
2 |
2 |
2 |
2 |
2 |
| Analog Voltage AV/DD(Min)(V) |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
| Analog Voltage AV/DD(Max)(V) |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
| Logic Voltage DV/DD(Min)(V) |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
| Logic Voltage DV/DD(Max)(V) |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
| Input Configuration Range |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
| Reference Mode |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
| Rating |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
| Pin/Package |
32QFN |
32QFN |
32QFN |
32QFN |
32QFN |
32QFN |
32QFN |
32QFN |
| # Input Channels |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
| Operating Temp Range(Celsius) |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
ADS6142 特性
- Maximum Sample Rate: 125 MSPS
- 14-Bit Resolution with No Missing Codes
- 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off
- Parallel CMOS and Double Data Rate (DDR) LVDS Output Options
- Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs, and Clock Amplitude Down to 400 mVPP
- Clock Duty Cycle Stabilizer
- Internal Reference with Support for External Reference
- No External Decoupling Required for References
- Programmable Output Clock Position and Drive Strength to Ease Data Capture
- 3.3-V Analog and 1.8-V to 3.3-V Digital Supply
- 32-QFN Package (5 mm × 5 mm)
- Pin Compatible 12-Bit Family (ADS612X)
- APPLICATIONS
- Wireless Communications Infrastructure
- Software Defined Radio
- Power Amplifier Linearization
- 802.16d/e
- Test and Measurement Instrumentation
- High Definition Video
- Medical Imaging
ADS6142 芯片订购指南
ADS6142 工具与软件
| 名称 |
型号 |
公司 |
工具/软件类型 |
| ADS6122 评估模块 |
ADS6122EVM |
Texas Instruments |
开发电路板/EVM |
| ADS6142 评估模块 |
ADS6142EVM |
Texas Instruments |
开发电路板/EVM |
| ADC 谐波计算器 |
ADC-HARMONIC-CALC |
Texas Instruments |
计算实用程序 |
| 用于模数转换器的抗混淆计算工具 |
ANTIALIASINGCALC |
Texas Instruments |
计算实用程序 |
| 运算放大器至 ADC 电路拓扑计算器 |
ADC-INPUT-CALC |
Texas Instruments |
计算实用程序 |
ADS6142 质量与无铅数据
ADS6142 应用技术支持与电子电路设计开发资源下载
- ADS6142 数据资料 dataSheet 下载.PDF
- TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- A
Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF
461 KB)
- A Spreadsheet for Calculating the Frequency Response of the
ADS1250-54
- Understanding the ADS1251, ADS1253, and ADS1254 Input
Circuitry (PDF 39 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)