ST10F273Z4Q3 512KBit Flash,36KBit RAM,16位微控制器LQFP-144封装

ST10F273Z4Q3 概述

The architecture of the ST10F273Z4 combines advantages of both RISC and CISC processors and an advanced peripheral subsystem. The block diagram gives an overview of the different on-chip components and the high bandwidth internal bus structure of the ST10F273Z4.

The memory space of the ST10F273Z4 is configured in a unified memory architecture.Code memory, data memory, registers and I/O ports are organized within the same linear address space of 16 Mbytes. The entire memory space can be accessed Byte wise or Word wise. Particular portions of the on-chip memory have additionally been made directly bit addressable.

IFlash: 512 Kbytes of on-chip Flash memory. It is divided in 10 blocks (B0F0...B0F9) of the Bank 0 and two blocks of Bank 1 (B1F0, B1F1): read-while-write operations inside the same Bank are not allowed. When Bootstrap mode is selected, the Test-Flash Block B0TF (8 Kbyte) appears at address 00’0000h: refer to Chapter 5: Internal Flash memory onpage 25 for more details on memory mapping in boot mode.

ST10F273Z4Q3 特性:

• High performance 16-bit CPU with DSP functions
  – 31.25 ns instruction cycle time at 64 MHz max CPU clock
  – Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator
  – Enhanced boolean bit manipulations
  – Single-cycle context switching support
• Memory organization
  – 512 Kbyte on-chip Flash memory single voltage with erase/program controller (full performance, 32-bit fetch)
  – 100K erasing/programming cycles.
  – Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C)
  – 2 Kbyte on-chip internal RAM (IRAM)
  – 34 Kbyte on-chip extension RAM (XRAM)
  – Programmable external bus configuration& characteristics for different address ranges
  – 5 programmable chip-select signals
  – Hold-acknowledge bus arbitration support
• Interrupt
  – 8-channel peripheral event controller for single cycle interrupt driven data transfer
  – 16-priority-level interrupt system with 56 sources, sampling rate down to 15.6 ns
• Timers
  – 2 multifunctional general purpose timer units with 5 timers
• Two 16-channel capture / compare units
• 4-channel PWM unit + 4-channel XPWM
• A/D Converter
  – 24-channel 10-bit
  – 3 μs Minimum conversion time
• Serial channels
  – 2 synch. / asynch. serial channels
  – 2 high-speed synchronous channels
  – I2C standard interface
• 2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2x32 messages, C-CAN version)
• Fail-safe protection
  – Programmable watchdog timer
  – Oscillator watchdog
• On-chip bootstrap loader
• Clock generation
  – On-chip PLL and 4 to 12 MHz oscillator
  – Direct or prescaled clock input
• Real-time clock and 32 kHz on-chip oscillator
• Up to 111 general purpose I/O lines
  – Individually programmable as input, output or special function
  – Programmable threshold (hysteresis)
• Idle, power down and stand-by modes
• Single voltage supply: 5 V ±10%.

ST10F273Z4Q3 订购型号:

Order code	Package	Max CPU frequency (MHz)	Flash	Xflash	RAM	Temperature range (°C)
ST10F273Z4T3	PQFP144	64	512 KB	No	36 KB	-40/+125
ST10F273Z4Q3	LQFP144	40	512 KB	No	36 KB	-40/+125

ST10F273Z4Q3 技术支持与电子电路设计开发资源下载

1. ST10F273Z4数据手册 DataSheet 下载.pdf
2. ST10 16位微控制器选型参数
3. 手册和产品指南.pdf
4. 8、16、32位微控制器.pdf
5. 意法半导体应用支持 . PDF
6. 先进半导体解决方案的门电子
7. 电机控制参考指南
8. 周围半导体机顶盒应用. PDF
9. STM32,STR7和STR9开发工具 . PDF
10. 8 ,16和32位微控制器产品和工具选择指南. PDF
11. 电机控制选型指南. PDF