汽车级 SPC563M60L5 32位的Power Architecture ?微控制器为基础的汽车
动力系统应用LQFP-144封装
SPC563Mxx is part of a family of devices that contain many new features coupled with high
performance 90 nm CMOS technology to provide substantial reduction of cost per feature
and significant performance improvement.
The host processor core of the SPC563Mxx complies with the Power ArchitectureTM Book
E. It is 100% user mode compatible (with floating point library) with the classic Power
ArchitectureTM instruction set. The Book E architecture has enhancements that improve the
Power ArchitectureTM is fit in embedded applications. In addition to the classic PowerPC
instruction set, this core also has additional instruction support for digital signal processing
(DSP).
The SPC563Mxx has a single level of memory hierarchy consisting of up to 94 Kbyte onchip
SRAM and up to 1.5 Mbyte of internal Flash memory. The SPC563Mxx also has an
external bus interface (EBI) for “calibration”(a).
SPC563M60L5 订购型号:
| Ordering Model |
Package |
RoHS Compliance Grade |
Marketing Status |
Core |
Internal RAM Size |
Timed I/Os |
Supply Voltage(Vcc) |
Supply Voltage(Vcc) |
Mounting |
Lifecycle: Date |
| nom |
min |
max |
| B |
V |
V |
| SPC563M60L5 |
LQFP 144 20X20X1.4 2 |
N/A |
Preview |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
Surface.Mount |
4/24/2008 |
| SPC563M60L5CAR |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563M60L5CAY |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563M60L5CBR |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563M60L5CBY |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563M60L5CCR |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563M60L5CCY |
- |
- |
Proposal |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
- |
- |
| SPC563MADPT144S |
CARD |
Not compliant |
Preview |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
Bare.Die |
2008-04-15T14:21:45 |
| SPC563MKIT144S |
CARD |
Not compliant |
Preview |
e200z3 |
62500 |
32 eTPU + 16 eMIOS channels |
4.5 |
5.5 |
Bare.Die |
2008-04-02T10:28:22 |
SPC563M60L5 特性:
- Single issue, 32-bit PowerPCTM Book E
compliant e200z335 CPU core complex
– Includes variable length encoding (VLE)
enhancements for code size reduction
- 32-channel direct memory access controller (DMA)
- Interrupt controller (INTC) capable of handling
364 selectable-priority interrupt sources: 191
peripheral interrupt sources, 8 software
interrupts and 165 reserved interrupts.
- Frequency-modulated phase-locked loop
(FMPLL)
- Calibration external bus interface (EBI)(a)
- System integration unit (SIU)
- Up to 1.5 Mbyte on-chip Flash with Flash
controller
– Fetch Accelerator for single cycle Flash
access @80 MHz
- Up to 94 Kbyte on-chip static RAM (including
up to 32 Kbyte standby RAM)
- Boot assist module (BAM)
- 32-channel second-generation enhanced time
processor unit (eTPU)
– 32 standard eTPU channels
– Architectural enhancements to improve
code efficiency and added flexibility
- 16-channels enhanced modular input-output
system (eMIOS)
- Enhanced queued analog-to-digital converter
(eQADC)
- Decimation filter (part of eQADC)
- Silicon die temperature sensor
- 2 deserial serial peripheral interface (DSPI)
modules (compatible with Microsecond Bus)
- 2 enhanced serial communication interface
(eSCI) modules compatible with LIN
- 2 controller area network (FlexCAN) modules
that support CAN 2.0B
- Nexus port controller (NPC) per IEEE-ISTO
5001-2003 standard
- IEEE 1149.1 (JTAG) support
- Nexus interface
- On-chip voltage regulator controller that
provides 1.2 V and 3.3 V internal supplies from
a 5 V external source.
- Available in LQFP100, LQFP144, LQFP176
and LBGA208.
SPC563M60L5 技术支持与电子电路设计开发资源下载
- ST意法SPC560P系列32位汽车微控制器SPC563M60L5 数据手册DataSheet 下载 . PDF(PDF 文件格式完整版)
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Excel 文档格式)
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