M48Z12 5V,16Kbit(2Kb×8)ZEROPOWER ?的SRAM
The M48Z02/12 ZEROPOWER? RAM is a 2K x 8 non-volatile static RAM which is pin and functional compatible with the DS1220.
A special 24-pin, 600mil DIP CAPHAT? package houses the M48Z02/12 silicon with a long life lithium button cell to form a highly integrated battery backed-up memory solution.
The M48Z02/12 button cell has sufficient capacity and storage life to maintain data functionality for an accumulated time period of at least 10 years in the absence of power over commercial operating temperature range.
The M48Z02/12 is a non-volatile pin and function equivalent to any JEDEC standard 2K x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed.
M48Z12 订购型号:
| Ordering Model | Package | RoHS Compliance Grade | Marketing Status | Memory Organization | Supply Voltage(Vcc) | Supply Voltage(Vcc) | Operating Range | Battery Low Detect(BL) | Packing Type |
| min | max | ||||||||
| V | V | ||||||||
| M48Z12-150PC1 | PDIP 24 .7 ZERO POWER | Ecopack1 | Active | 16Kb (2K x 8) | 4.5 | 5.5 | Commercial | Yes | Tube |
| M48Z12-200PC1 | PDIP 24 .7 ZERO POWER | Ecopack1 | Active | 16Kb (2K x 8) | 4.5 | 5.5 | Commercial | Yes | Tube |
| M48Z12-70PC1 | PDIP 24 .7 ZERO POWER | Ecopack1 | Active | 16Kb (2K x 8) | 4.5 | 5.5 | Commercial | Yes | Tube |
M48Z12 产品特性:
- Integrated, ultra low power SRAM and powerfail control circuit
- Unlimited WRITE cycles
- READ cycle time equals WRITE cycle time
- Automatic power-fail chip deselect and WRITE protection
- WRITE protect voltages
(VPFD = Power-fail deselect voltage):
– M48Z02: VCC = 4.75 to 5.5V; 4.5V ≤ VPFD ≤ 4.75V
– M48Z12: VCC = 4.5 to 5.5V; 4.2V ≤ VPFD ≤ 4.5V - Self-contained battery in the CAPHAT? DIP package
- Pin and function compatible with JEDEC standard 2K x 8 SRAMs
- RoHS compliant
– Lead-free second level interconnect
M48Z12 技术支持与电子电路设计开发资源下载
- M48Z12 数据手册DataSheet下载.PDF
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